BANGALORE, INDIA: Sapphire Technology has announced an exciting development in graphics for several generations –- not only the fastest single GPU ever, but also the first video cards to support the advanced graphical features only available in Microsoft DirectX 11 and delivering spectacular video clarity, speed and visual effects, including over multiple monitors.
The SAPPHIRE HD 5870 is based on advanced new graphics architecture from the ATI division of AMD, the second generation of GPU to be built in its 40nm process. This is the very first series of graphics solutions to support the forthcoming DirectX 11, soon to be introduced with Windows 7 and supported in Windows Vista.
With a new 150GB/s memory interface supporting fifth generation GDDR5 memory and a new architecture with a total of 1600 stream processors and 80 texture units* the HD 5870 has twice the computing power of the previous generation.
It will be lightning fast with existing DirectX10.1, DirectX 10 and DirectX 9.0 games and applications –- but where it excels will be in new releases of software using DirectX 11 where it will support stunning new levels of detail, transparency and lighting effects.
All of this comes with the modest active power consumption of less that 190W –- and using Dynamic Power Management the card has a new super low-power idle mode at 27W.
At the same time, SAPPHIRE will introduce the SAPPHIRE HD 5850, with the slightly smaller configuration of 1440 stream processors and 72 texture units offering users access to the same new generation technology and full DirectX 11 support at a lower price point.
Wednesday, 30 September 2009
GLOBALFOUNDRIES to highlight 32nm/28nm leadership at GSA Expo
SUNNYVALE, USA: As the semiconductor industry begins its transition to the next technology node, GLOBALFOUNDRIES is on track to take its position as the foundry technology leader.
On October 1 at the Global Semiconductor Alliance Emerging Opportunities Expo & Conference in Santa Clara, Calif., GLOBALFOUNDRIES (Booth 321) will provide the latest details on its technology roadmap for the 32nm/28nm generations and its innovative “Gate First” approach to building transistors based on High-K Metal Gate (HKMG) technology.
“With each new technology generation, semiconductor foundries are increasingly challenged with the economics to sustain R&D and the know-how to bring these technologies to market in high-volume,” said Len Jelinek, director and chief analyst, iSuppli. “With a heritage of rapidly ramping leading-edge technologies to high volumes at mature yields, combined with aggressive investments in capacity and technology, GLOBALFOUNDRIES is uniquely-positioned to challenge for next-generation foundry leadership.”
GLOBALFOUNDRIES expects to start volume production of 32nm-SHP (Super High Performance) technology at Fab 1 in the second half of 2010. This technology will employ silicon-on-insulator (SOI) substrates and utilize GLOBALFOUNDRIES’ innovative “Gate First” approach to HKMG, which maximizes power efficiency and transistor scaling while minimizing die size and design complexity when compared to the alternative “Gate Last” approach. Yield progress continues with 24Mb SRAMs in double-digit natural yields on path to 50 per cent natural yields by year-end.
“When compared against the 45nm-SHP technology we’re currently running in Fab 1, we’re seeing performance improvements of up to 50 percent in the 32nm generation at the same leakage levels of the 45nm generation,” said Jim Doran, senior vice president and general manager of Fab 1 at GLOBALFOUNDRIES. “When you combine this with our patented Automated Precision Manufacturing (APM) technology and exceptionally low defect densities, we believe we’ll be in the leading position among foundries to bring this technology to market in volume for our customers.”
As a new entrant to the foundry landscape, GLOBALFOUNDRIES brings a heritage of leading-edge production for high-performance processors. During the transition to the 45nm technology generation, GLOBALFOUNDRIES reached volume production at mature yield 2-3 quarters ahead of the rest of the foundry industry, while simultaneously implementing a complex new form of lithography—immersion lithography—ahead of all other semiconductor manufacturers.
For the 28nm generation, which will be offered on bulk silicon substrates, the company will be accepting customer and third party IP designs in Q1 2010 on its shuttle service for low cost prototyping, with production planned in the second half of 2010.
The 28nm technology offers the smallest SRAM cell size (0.120 µm2) currently reported in the foundry industry, and an advantage in die size relative to 28nm “Gate Last” approaches. In addition, the GLOBALFOUNDRIES’ “Gate First” approach to HKMG simplifies 28nm design implementation and IP re-use for customers using conventional poly/SiON-based technology at the 45/40nm and 32nm nodes due to similar process flows and design rules.
Customers at the 28nm node will benefit from a high-volume ramp of leading-edge technology at the 32nm node, which will put GLOBALFOUNDRIES well into its second generation of HKMG implementation when 28nm production begins.
The 28nm node will be available in two variants: The 28nm-HP (High Performance) variant will be optimized for leading-edge applications in such areas as graphics, game consoles, storage, networking and media encoding. The 28nm-SLP (Super Low Power) variant is optimized for wireless mobile applications such as baseband, application processors, and other handheld functions that require long battery lifetime.
GLOBALFOUNDRIES’ 32nm and 28nm technologies with the “Gate First” approach to HKMG were originally developed in partnership with IBM through the company’s participation in the IBM Technology Alliance. IBM and its research partners first introduced the “Gate First” HKMG innovation in 2007 as the basis for a long-sought improvement to the transistor to deal with power leakage that emerged at the 45nm node.
On October 1 at the Global Semiconductor Alliance Emerging Opportunities Expo & Conference in Santa Clara, Calif., GLOBALFOUNDRIES (Booth 321) will provide the latest details on its technology roadmap for the 32nm/28nm generations and its innovative “Gate First” approach to building transistors based on High-K Metal Gate (HKMG) technology.
“With each new technology generation, semiconductor foundries are increasingly challenged with the economics to sustain R&D and the know-how to bring these technologies to market in high-volume,” said Len Jelinek, director and chief analyst, iSuppli. “With a heritage of rapidly ramping leading-edge technologies to high volumes at mature yields, combined with aggressive investments in capacity and technology, GLOBALFOUNDRIES is uniquely-positioned to challenge for next-generation foundry leadership.”
GLOBALFOUNDRIES expects to start volume production of 32nm-SHP (Super High Performance) technology at Fab 1 in the second half of 2010. This technology will employ silicon-on-insulator (SOI) substrates and utilize GLOBALFOUNDRIES’ innovative “Gate First” approach to HKMG, which maximizes power efficiency and transistor scaling while minimizing die size and design complexity when compared to the alternative “Gate Last” approach. Yield progress continues with 24Mb SRAMs in double-digit natural yields on path to 50 per cent natural yields by year-end.
“When compared against the 45nm-SHP technology we’re currently running in Fab 1, we’re seeing performance improvements of up to 50 percent in the 32nm generation at the same leakage levels of the 45nm generation,” said Jim Doran, senior vice president and general manager of Fab 1 at GLOBALFOUNDRIES. “When you combine this with our patented Automated Precision Manufacturing (APM) technology and exceptionally low defect densities, we believe we’ll be in the leading position among foundries to bring this technology to market in volume for our customers.”
As a new entrant to the foundry landscape, GLOBALFOUNDRIES brings a heritage of leading-edge production for high-performance processors. During the transition to the 45nm technology generation, GLOBALFOUNDRIES reached volume production at mature yield 2-3 quarters ahead of the rest of the foundry industry, while simultaneously implementing a complex new form of lithography—immersion lithography—ahead of all other semiconductor manufacturers.
For the 28nm generation, which will be offered on bulk silicon substrates, the company will be accepting customer and third party IP designs in Q1 2010 on its shuttle service for low cost prototyping, with production planned in the second half of 2010.
The 28nm technology offers the smallest SRAM cell size (0.120 µm2) currently reported in the foundry industry, and an advantage in die size relative to 28nm “Gate Last” approaches. In addition, the GLOBALFOUNDRIES’ “Gate First” approach to HKMG simplifies 28nm design implementation and IP re-use for customers using conventional poly/SiON-based technology at the 45/40nm and 32nm nodes due to similar process flows and design rules.
Customers at the 28nm node will benefit from a high-volume ramp of leading-edge technology at the 32nm node, which will put GLOBALFOUNDRIES well into its second generation of HKMG implementation when 28nm production begins.
The 28nm node will be available in two variants: The 28nm-HP (High Performance) variant will be optimized for leading-edge applications in such areas as graphics, game consoles, storage, networking and media encoding. The 28nm-SLP (Super Low Power) variant is optimized for wireless mobile applications such as baseband, application processors, and other handheld functions that require long battery lifetime.
GLOBALFOUNDRIES’ 32nm and 28nm technologies with the “Gate First” approach to HKMG were originally developed in partnership with IBM through the company’s participation in the IBM Technology Alliance. IBM and its research partners first introduced the “Gate First” HKMG innovation in 2007 as the basis for a long-sought improvement to the transistor to deal with power leakage that emerged at the 45nm node.
Infineon demos remote PC peripherals authentication with ORIGA authentication chip
BANGALORE, INDIA: Infineon Technologies AG announced that its unique chip-based asymmetric authentication solution has been ported to Intel vPro technology, providing the basis for IT system administrators, OEM Tech Support and Warranty Services to improve the integrity of computer systems.
At the recent Intel Developer Forum 2009, Infineon demonstrated how chip-based authentication can help implement authentication of PC peripherals and improve the integrity of enterprise systems. The Infineon ORIGA (SLE 95050) chip makes it possible to recognize if a peripheral or accessory, such as external storage devices and graphics cards, is original equipment or cloned.
Cloned devices, which may not offer the same level of reliability, quality and warranty as authorized original equipment, cannot be operated on a system configured to work only with authenticated hardware. In environments with Intel vPro technology, IT administrators and other authorized users can use Intel Active Management Technology (AMT) to authenticate system components and perform inventory checks of networked assets.
“Authentication of devices can enhance system security by restricting access if an unauthorized PC peripheral or accessory is attached to a client device,” said Paolo Cocchiglia, Vice President, ASIC and Power IC, Infineon Technologies North America Corp.
“In conjunction with Intel vPro technology, it can also improve reliability and help to reduce maintenance issues by preventing deliberate or accidental use of cloned devices, since an administrator can readily identify any cloned or unauthorized devices attached to a system and address the issue before it causes problems. Together with energy efficiency and communication, security is one of the three focus areas of Infineon.”
“We are committed to creating an ecosystem of suppliers and partners to enhance the native capabilities of Intel vPro technology,” said Larry Wiklund, Director Business Development, Business Client Group, Intel.
“Infineon’s demonstration of hard-wired authentication for system components and peripherals shows how IT administrators can gain access to a new and powerful tool to enhance the integrity of systems and help validate that all hardware in a digital office environment complies with corporate requirements.”
In the demonstration, a USB-stick containing the ORIGA chip acted as a peripheral to be authenticated. In practice, manufacturers of peripherals and accessories, including graphics cards, external storage devices, networking cards, user interface accessories, notebook and netbook batteries, etc., would integrate the chip into their products, working with Infineon to implement a secure authentication supply chain.
The demonstration utilizes the IDE_REDIRECT feature of Intel AMT to illustrate how remote secure manageability from Intel can be coupled with strong and secure authentication technology from Infineon to deliver solutions for a secure digital office.
Infineon’s authentication chip, the ORIGA (SLE 95050), provides asymmetric authentication based on elliptic curve cryptography (ECC). The low-power chip, with single wire bus interface, can be operated in a bus-powered mode and contains a hardware-protected private key that is integrated into the peripheral device.
The host device only contains a software resident public key that is used in the authentication process. ECC is a more advanced encryption/decryption algorithm than today’s asymmetric systems (i.e. RSA) and the public/private key algorithms are recognized as more secure than symmetric, shared key systems like AES and DES.
The ECC asymmetric authentication technology allows different host-to-peripheral authentication which is independent of the location of the peripheral or the communication interface (wireless, local, wired, chip-to-chip, etc.).
Additional applications of ORIGA technology include allowing service providers (i.e. Internet, data service, media provider) to use secure authentication technology to deliver content to the rightful subscriber or owner, and providing consumers with a tool for secure digital home environments.
At the recent Intel Developer Forum 2009, Infineon demonstrated how chip-based authentication can help implement authentication of PC peripherals and improve the integrity of enterprise systems. The Infineon ORIGA (SLE 95050) chip makes it possible to recognize if a peripheral or accessory, such as external storage devices and graphics cards, is original equipment or cloned.
Cloned devices, which may not offer the same level of reliability, quality and warranty as authorized original equipment, cannot be operated on a system configured to work only with authenticated hardware. In environments with Intel vPro technology, IT administrators and other authorized users can use Intel Active Management Technology (AMT) to authenticate system components and perform inventory checks of networked assets.
“Authentication of devices can enhance system security by restricting access if an unauthorized PC peripheral or accessory is attached to a client device,” said Paolo Cocchiglia, Vice President, ASIC and Power IC, Infineon Technologies North America Corp.
“In conjunction with Intel vPro technology, it can also improve reliability and help to reduce maintenance issues by preventing deliberate or accidental use of cloned devices, since an administrator can readily identify any cloned or unauthorized devices attached to a system and address the issue before it causes problems. Together with energy efficiency and communication, security is one of the three focus areas of Infineon.”
“We are committed to creating an ecosystem of suppliers and partners to enhance the native capabilities of Intel vPro technology,” said Larry Wiklund, Director Business Development, Business Client Group, Intel.
“Infineon’s demonstration of hard-wired authentication for system components and peripherals shows how IT administrators can gain access to a new and powerful tool to enhance the integrity of systems and help validate that all hardware in a digital office environment complies with corporate requirements.”
In the demonstration, a USB-stick containing the ORIGA chip acted as a peripheral to be authenticated. In practice, manufacturers of peripherals and accessories, including graphics cards, external storage devices, networking cards, user interface accessories, notebook and netbook batteries, etc., would integrate the chip into their products, working with Infineon to implement a secure authentication supply chain.
The demonstration utilizes the IDE_REDIRECT feature of Intel AMT to illustrate how remote secure manageability from Intel can be coupled with strong and secure authentication technology from Infineon to deliver solutions for a secure digital office.
Infineon’s authentication chip, the ORIGA (SLE 95050), provides asymmetric authentication based on elliptic curve cryptography (ECC). The low-power chip, with single wire bus interface, can be operated in a bus-powered mode and contains a hardware-protected private key that is integrated into the peripheral device.
The host device only contains a software resident public key that is used in the authentication process. ECC is a more advanced encryption/decryption algorithm than today’s asymmetric systems (i.e. RSA) and the public/private key algorithms are recognized as more secure than symmetric, shared key systems like AES and DES.
The ECC asymmetric authentication technology allows different host-to-peripheral authentication which is independent of the location of the peripheral or the communication interface (wireless, local, wired, chip-to-chip, etc.).
Additional applications of ORIGA technology include allowing service providers (i.e. Internet, data service, media provider) to use secure authentication technology to deliver content to the rightful subscriber or owner, and providing consumers with a tool for secure digital home environments.
AWR, WIN Semiconductors process design kit for H2W PH50-00 GaAs foundry process
EL SEGUNDO, USA & TAO YUAN SHIEN, TAIWAN: AWR and WIN Semiconductors Corp. (WIN) have released of the WIN/AWR H2W PH50-00 process design kit (PDK). The PDK for the WIN PH50-00 GaAs enhancement/depletion-mode pseudomorphic high electron mobility transistor (pHEMT) and heterojunction bipolar transistor (HBT) foundry process is the latest in AWR’s series of PDKs available to monolithic microwave integrated circuit (MMIC) designers.
WIN PH50-00 is a high-frequency, high-power MMIC process that has been in production since 2007. Until now, PDKs and design tools have lacked the technology needed to take full advantage of the advanced features in the process. However, the new WIN/AWR PDK announced today fully exploits the process along with the unique, innovative technologies in the latest version of Microwave Office software (v2009), as well as AWR’s ACETM automatic circuit extraction technology, AXIEMTM 3D planar electromagnetic simulator, and APLAC multi-rate harmonic balance (MRHB™) simulator. The WIN/AWR PP50-00 PDK can be resident in Microwave Office software simultaneously with packaging and other foundry PDKs to provide a complete module co-design environment.
“The latest WIN/AWR PDK provides customers with the most accurate models available for pHEMT and HBT process technologies,” said Gary St. Onge, senior vice president of international sales at WIN Semiconductors. "By facilitating our customers’ design flow with advanced compound semiconductor processes as well as advanced EDA tools and flows, we bridge the gap from design concept to working product.”
“The PH50-00 process from WIN Semiconductors continues to win high praise from MMIC designers around the world,” said Sherry Hess, vice president of marketing at AWR. “Its versatility is unmatched in enabling high levels of integration and performance. These achievements make the process exceptionally well suited for the most complex, functionally-dense MMICs. The AWR/WIN PH50-00 PDK allows designers to embrace the full potential of the PH50-00 process.”
WIN PH50-00 is a high-frequency, high-power MMIC process that has been in production since 2007. Until now, PDKs and design tools have lacked the technology needed to take full advantage of the advanced features in the process. However, the new WIN/AWR PDK announced today fully exploits the process along with the unique, innovative technologies in the latest version of Microwave Office software (v2009), as well as AWR’s ACETM automatic circuit extraction technology, AXIEMTM 3D planar electromagnetic simulator, and APLAC multi-rate harmonic balance (MRHB™) simulator. The WIN/AWR PP50-00 PDK can be resident in Microwave Office software simultaneously with packaging and other foundry PDKs to provide a complete module co-design environment.
“The latest WIN/AWR PDK provides customers with the most accurate models available for pHEMT and HBT process technologies,” said Gary St. Onge, senior vice president of international sales at WIN Semiconductors. "By facilitating our customers’ design flow with advanced compound semiconductor processes as well as advanced EDA tools and flows, we bridge the gap from design concept to working product.”
“The PH50-00 process from WIN Semiconductors continues to win high praise from MMIC designers around the world,” said Sherry Hess, vice president of marketing at AWR. “Its versatility is unmatched in enabling high levels of integration and performance. These achievements make the process exceptionally well suited for the most complex, functionally-dense MMICs. The AWR/WIN PH50-00 PDK allows designers to embrace the full potential of the PH50-00 process.”
Top EMS/ODM vendors gain stability
EL SEGUNDO, USA: Following alarming revenue plunges in late 2008 and early 2009, the global electronics contract manufacturing business showed signs of stabilization in the second quarter, with the top players experiencing a collective return to growth, according to iSuppli Corp.
Based on a review of second-quarter sales data, the Top-10 Electronics Manufacturing Service (EMS) providers achieved revenue growth of 1.6 percent compared to the first quarter. While this may not appear to be much of an increase, it represents a dramatic swing from the 25 percent sequential revenue contraction in the first quarter.
The Top-10 Original Design Manufacturers (ODMs) performed much better, with second-quarter revenue rising by 12 percent compared to the first quarter. This contrasts with a 14 percent sequential decline in the first quarter.
Fig. 1 presents quarterly sequential revenue changes for the Top-10 EMS providers.
Source: iSuppli, USA
“The year 2009 could not have started any worse for contract manufacturers,” said Adam Pick, director and principal analyst for EMS/ODM at iSuppli. “However, during the second quarter, senior managers at EMS and ODM companies hinted that performance was stabilizing as demand firmed, cost structures adjusted and inventory decreased.
“iSuppli’s research confirms that the market did regain its footing in the second quarter. Despite these positive signs, it’s still too early to celebrate an electronics manufacturing recovery. Several factors continue to cloud the outlook for EMS/ODM.”
One major factor is the global recession, which remains severe. Although revenue is rising on a sequential basis, the effects of the economic downturn can still be seen when making a year-over-year comparison. Second-quarter revenue for the Top-10 EMS providers was down 15 percent from 2008, and sales remain significantly lower than the normal seasonal pattern.
Fig. 2 presents the quarterly year-over-year growth outlook for the top-10 global EMS providers.
Source: iSuppli, USA
As Fig. 2 presents, quarterly revenue for the Top-10 EMS providers compared to a year earlier has performed dismally since the fourth quarter of 2008.
Furthermore, certain OEMs are adopting strategic and recessionary manufacturing strategies, hindering growth for contract manufacturers.
As evidenced by the moves of Nokia and NCR, some OEMs are taking back manufacturing operations from their outsourcing providers. For example, iSuppli estimates that Nokia has reclaimed as much as $5 billion worth of spending from its EMS/ODM partners during this recession.
Other OEMs are acquiring assets from EMS providers to ensure continuity of supply. OEM Ericsson has taken this action with contract manufacturer Elcoteq.
Another market inhibitor is overcapacity, which continues to plague contract manufacturers by pressuring margins. Finally, ongoing shortages for devices, including optical disk drives and display panels, are negatively impacting the electronics supply chain in Taiwan and China.
To adjust to these market realities, managers at EMS/ODM firms are taking appropriate actions to right-size their cost structures and to collaborate with OEMs and suppliers to establish realistic expectations for the future.
Wall Street also has corrected its expectations for the contract manufacturing market, with the industry’s second-quarter results conforming with or slightly exceeding financial analysts’ expectations.
However, four of the Top-10 EMS providers failed to improve revenues on a sequential basis during the second quarter. Furthermore, when Foxconn’s sales are excluded, revenues of the Top-10 EMS providers actually contracted in the second quarter on a sequential basis.
Finally, when examining forward-looking guidance against historical datasets, it is apparent that a true bottoming out of the market remains elusive for some EMS providers.
Despite the various adjustments that EMS providers have had to make, a resurgence of notebook and netbook orders to the ODMs has inspired bullish sentiment among a number of companies, including Quanta, Compal, Wistron and Inventec.
Even with component shortages and lackluster guidance from Hewlett-Packard, Lenovo and Dell, certain ODMs have suggested that second-half shipments will greatly outpace first-half production given macroeconomic trends and the introduction into the market of products with new features.
Based on a review of second-quarter sales data, the Top-10 Electronics Manufacturing Service (EMS) providers achieved revenue growth of 1.6 percent compared to the first quarter. While this may not appear to be much of an increase, it represents a dramatic swing from the 25 percent sequential revenue contraction in the first quarter.
The Top-10 Original Design Manufacturers (ODMs) performed much better, with second-quarter revenue rising by 12 percent compared to the first quarter. This contrasts with a 14 percent sequential decline in the first quarter.
Fig. 1 presents quarterly sequential revenue changes for the Top-10 EMS providers.
Source: iSuppli, USA“The year 2009 could not have started any worse for contract manufacturers,” said Adam Pick, director and principal analyst for EMS/ODM at iSuppli. “However, during the second quarter, senior managers at EMS and ODM companies hinted that performance was stabilizing as demand firmed, cost structures adjusted and inventory decreased.
“iSuppli’s research confirms that the market did regain its footing in the second quarter. Despite these positive signs, it’s still too early to celebrate an electronics manufacturing recovery. Several factors continue to cloud the outlook for EMS/ODM.”
One major factor is the global recession, which remains severe. Although revenue is rising on a sequential basis, the effects of the economic downturn can still be seen when making a year-over-year comparison. Second-quarter revenue for the Top-10 EMS providers was down 15 percent from 2008, and sales remain significantly lower than the normal seasonal pattern.
Fig. 2 presents the quarterly year-over-year growth outlook for the top-10 global EMS providers.
Source: iSuppli, USAAs Fig. 2 presents, quarterly revenue for the Top-10 EMS providers compared to a year earlier has performed dismally since the fourth quarter of 2008.
Furthermore, certain OEMs are adopting strategic and recessionary manufacturing strategies, hindering growth for contract manufacturers.
As evidenced by the moves of Nokia and NCR, some OEMs are taking back manufacturing operations from their outsourcing providers. For example, iSuppli estimates that Nokia has reclaimed as much as $5 billion worth of spending from its EMS/ODM partners during this recession.
Other OEMs are acquiring assets from EMS providers to ensure continuity of supply. OEM Ericsson has taken this action with contract manufacturer Elcoteq.
Another market inhibitor is overcapacity, which continues to plague contract manufacturers by pressuring margins. Finally, ongoing shortages for devices, including optical disk drives and display panels, are negatively impacting the electronics supply chain in Taiwan and China.
To adjust to these market realities, managers at EMS/ODM firms are taking appropriate actions to right-size their cost structures and to collaborate with OEMs and suppliers to establish realistic expectations for the future.
Wall Street also has corrected its expectations for the contract manufacturing market, with the industry’s second-quarter results conforming with or slightly exceeding financial analysts’ expectations.
However, four of the Top-10 EMS providers failed to improve revenues on a sequential basis during the second quarter. Furthermore, when Foxconn’s sales are excluded, revenues of the Top-10 EMS providers actually contracted in the second quarter on a sequential basis.
Finally, when examining forward-looking guidance against historical datasets, it is apparent that a true bottoming out of the market remains elusive for some EMS providers.
Despite the various adjustments that EMS providers have had to make, a resurgence of notebook and netbook orders to the ODMs has inspired bullish sentiment among a number of companies, including Quanta, Compal, Wistron and Inventec.
Even with component shortages and lackluster guidance from Hewlett-Packard, Lenovo and Dell, certain ODMs have suggested that second-half shipments will greatly outpace first-half production given macroeconomic trends and the introduction into the market of products with new features.
ARM processors gaining momentum in sub-notebook market
NEW TRIPOLI, USA: Since Qualcomm officially coined the term “Smartbook” in late May 2009 to differentiate between Intel’s Atom-based netbook and ARM’s ARM-based subnotebook (now the Smartbook), the IT industry is moving in high gear to supplant Atom’s dominance in the lucrative netbook/subnotebook market.
We pointed out on March 9, 2009 in press releases and blogs that ARM processors, not Intel’s Atom, will benefit from the current technology-economic cycle. We noted that while Intel’s Atom dominate the market in 2009, a movement is underway that will enable the ARM processor to gain a 55 percent market share in 2012.
The term Smartbook now makes it easy for us analysts to differentiate between the two. Below is our forecast of the market:
Netbook/Smartbook Market Forecast
Source: The Information Network
Already, Lenovo, Nokia, Foxconn, Sony Ericsson, and Sharp are planning smartbooks. ARM runs under the Linux operating system. Linux is free, whereas Microsoft charges a licensing fee up to $35 on each netbook. To further keep cost down near the intended $100 price point, enter cloud computing.
Google's Linux-based Chrome OS offers an improved suite of productivity applications, which will influence netbook purchasers toward the ARM system. There is a wide array of open-source software that all Linux distributions share. It is reshaping the software industry by reducing the overall cost structure and represents the future of enterprise software.
As cloud computing becomes more sophisticated, we will see an Internet protocol-based convergence of audio, video, productivity applications, and IT data run on ARM-based netbooks.
Smartbook/Netbook Features
Source: The Information Network
We also envisioned on March 9 that subsidized netbooks would start appearing. “Along with the growing competition among software service providers, we will see a new infrastructure taking hold, modeled after Hewlett-Packard (cheap printer, expensive ink) and the mobile service providers (cheap cellphone, expensive monthly wireless charge). This subsidized bundle model will grow the ARM netbook to greater market shares.”
We were correct and AT&T seemed to think it was a good idea. The wireless provider started offering subsidized netbooks for as little as $49.99 in two markets, Atlanta and Philadelphia.
Netbooks are showing 3G connectivity rates ten times that of notebooks. Kindle 2 from Amazon is basically a mobile phone platform. The processor is a Freescale Semiconductor i.MX31 with an ARM11 core, and the 3G communication module uses a chipset from Qualcomm.
Sales of netbooks bundled with 3G services in the Taiwan market reached 15,000 units in August, accounting for 50% of total retail sales. Smartbooks, because of their design and need for cloud connectivity, will grow even stronger.
We pointed out on March 9, 2009 in press releases and blogs that ARM processors, not Intel’s Atom, will benefit from the current technology-economic cycle. We noted that while Intel’s Atom dominate the market in 2009, a movement is underway that will enable the ARM processor to gain a 55 percent market share in 2012.
The term Smartbook now makes it easy for us analysts to differentiate between the two. Below is our forecast of the market:
Netbook/Smartbook Market Forecast
Source: The Information NetworkAlready, Lenovo, Nokia, Foxconn, Sony Ericsson, and Sharp are planning smartbooks. ARM runs under the Linux operating system. Linux is free, whereas Microsoft charges a licensing fee up to $35 on each netbook. To further keep cost down near the intended $100 price point, enter cloud computing.
Google's Linux-based Chrome OS offers an improved suite of productivity applications, which will influence netbook purchasers toward the ARM system. There is a wide array of open-source software that all Linux distributions share. It is reshaping the software industry by reducing the overall cost structure and represents the future of enterprise software.
As cloud computing becomes more sophisticated, we will see an Internet protocol-based convergence of audio, video, productivity applications, and IT data run on ARM-based netbooks.
Smartbook/Netbook Features
Source: The Information NetworkWe also envisioned on March 9 that subsidized netbooks would start appearing. “Along with the growing competition among software service providers, we will see a new infrastructure taking hold, modeled after Hewlett-Packard (cheap printer, expensive ink) and the mobile service providers (cheap cellphone, expensive monthly wireless charge). This subsidized bundle model will grow the ARM netbook to greater market shares.”
We were correct and AT&T seemed to think it was a good idea. The wireless provider started offering subsidized netbooks for as little as $49.99 in two markets, Atlanta and Philadelphia.
Netbooks are showing 3G connectivity rates ten times that of notebooks. Kindle 2 from Amazon is basically a mobile phone platform. The processor is a Freescale Semiconductor i.MX31 with an ARM11 core, and the 3G communication module uses a chipset from Qualcomm.
Sales of netbooks bundled with 3G services in the Taiwan market reached 15,000 units in August, accounting for 50% of total retail sales. Smartbooks, because of their design and need for cloud connectivity, will grow even stronger.
TI announces new 720 MHz OMAP3530 processor for multimedia apps
BANGALORE, INDIA: Giving designers more performance to run new application features and additional headroom to add their own IP, Texas Instruments Inc.(TI) announced a speed upgrade for the OMAP3530 applications processor and evaluation module (EVM).
The new OMAP3530 processor features a 720 MHz ARM Cortex-A8 core and a 520 MHz TMS320C64x+ DSP. This enables users to gain faster access to databases, spreadsheets, presentations, e-mail, audio and video attachments, Web browsing and video conferencing applications.
This single-chip solution also supports faster boot times suitable for applications such as portable infotainment, Point-of-Sale (POS) devices, Web tablets and single board computers.
720 MHz OMAP3530 processor key features and benefits:
* 720 MHz ARM Cortex-A8 core provides 1400 Dhrystone million instructions per second (MIPS).
* 520 MHz C64x+ DSP provides more headroom to optimize quality audio and video codecs and custom IP.
* POWERVR SGX subsystem for 3D graphics acceleration to support display and gaming effects.
* Comprehensive power and clock-management scheme that enables high-performance, low-power operation and low-power standby features.
* Pin-for-pin compatible with TI’s OMAP35x devices makes it easy for OEMs to efficiently create a complete product portfolio based on the single platform.
OMAP3530 EVM key features and benefits:
* Based on the 720 MHz OMAP3530 processor and can also be used to evaluate the OMAP3503, OMAP3515 and OMAP3525.
* Ability to run full-featured operating systems, such as Windows® Embedded CE and Linux.
* New S-Video/Component/Composite input, S-Video output.
* Features TI’s TVP5146 analog-to-digital video decoder.
* TI integrated power management ICs, OMAP3530 power requirements and design considerations.
The new OMAP3530 processor features a 720 MHz ARM Cortex-A8 core and a 520 MHz TMS320C64x+ DSP. This enables users to gain faster access to databases, spreadsheets, presentations, e-mail, audio and video attachments, Web browsing and video conferencing applications.
This single-chip solution also supports faster boot times suitable for applications such as portable infotainment, Point-of-Sale (POS) devices, Web tablets and single board computers.
720 MHz OMAP3530 processor key features and benefits:
* 720 MHz ARM Cortex-A8 core provides 1400 Dhrystone million instructions per second (MIPS).
* 520 MHz C64x+ DSP provides more headroom to optimize quality audio and video codecs and custom IP.
* POWERVR SGX subsystem for 3D graphics acceleration to support display and gaming effects.
* Comprehensive power and clock-management scheme that enables high-performance, low-power operation and low-power standby features.
* Pin-for-pin compatible with TI’s OMAP35x devices makes it easy for OEMs to efficiently create a complete product portfolio based on the single platform.
OMAP3530 EVM key features and benefits:
* Based on the 720 MHz OMAP3530 processor and can also be used to evaluate the OMAP3503, OMAP3515 and OMAP3525.
* Ability to run full-featured operating systems, such as Windows® Embedded CE and Linux.
* New S-Video/Component/Composite input, S-Video output.
* Features TI’s TVP5146 analog-to-digital video decoder.
* TI integrated power management ICs, OMAP3530 power requirements and design considerations.
Visibility improves for global semiconductor market
EL SEGUNDO, USA: Strong second-quarter sequential growth along with improving supply chain visibility and semiconductor demand trends has prompted iSuppli Corp. to upgrade its forecast of 2009 chip sales.
iSuppli now predicts global chip sales will decline by 16.5 percent in 2009, compared to the publicly announced forecast previously of a 23 percent drop. In a forecast delivered to clients in early August, iSuppli had improved its 2009 growth forecast to a 17.6 percent decline.
The figure presents iSuppli’s current forecast of global semiconductor revenue.
iSuppli: Global Annual Semiconductor Revenue Forecast (Millions of US$)
Source: iSuppli, Sept. 2009
“Lack of visibility from the end market and through the electronics supply chain was a major problem for semiconductor suppliers in the first quarter,” said Dale Ford, senior vice president, market intelligence services for iSuppli. “However, due to a stabilizing economic environment in the second quarter and improving supply chain visibility, semiconductor shipments rebounded as inventories were replenished and modest forward-looking purchases were made.”
Third-quarter semiconductor sales are benefitting from improved market outlooks by major OEMs in key markets such as PCs and mobile handsets.
The global economy in the second quarter was boosted by worldwide economic stimulus efforts. Although the American Recovery and Reinvestment Act (ARRA) really didn’t go into effect during the period, China’s stimulus efforts spurred a massive increase in consumer purchasing in the country, benefitting worldwide economic conditions.
Uncharted territory
While the outlook for the global semiconductor market may have gained some clarity, the industry appears to have entered uncharted territory when it comes to tracking sales trends.
“In the history of the semiconductor industry, the market has never had a cycle like this one,” Ford said. “Semiconductor sales have always been subject to a cyclical growth pattern that sees a move from a low point, through one or more supply-chain balancing periods and then to an eventual peak in revenue. However, the most recent cycle, starting in February 2006, was robbed of its peak. Just as the industry had achieved a balanced supply chain and was starting to move toward a peak, the global economic crisis drove the industry down.”
For the semiconductor industry, this means a both a long and painful downturn. While revenue began growing on a sequential basis in the second quarter of 2009, sales will not begin to increase on a year-to-year basis until May 2010. This means the industry will endure 20 months without year-over-year revenue growth, compared to the 17-month downturn that the industry experienced during the 2001-2002 decline.
While 2010 will bring a return to growth in the semiconductor industry with a 13.8 percent rise compared to 2009, the market won’t return to its 2007, pre-downturn level until 2012. Global semiconductor revenue will rise to $282.7 billion in 2012, compared to $273.4 billion in 2007.
Equipped for downturn
iSuppli forecasts that global revenue from shipments of electronic equipment will decline by 9 percent in 2009 to $1.39 trillion, down from $1.53 trillion in 2008. Growth will rebound by 5.2 percent in 2010 to reach $1.47 trillion.
iSuppli now predicts global chip sales will decline by 16.5 percent in 2009, compared to the publicly announced forecast previously of a 23 percent drop. In a forecast delivered to clients in early August, iSuppli had improved its 2009 growth forecast to a 17.6 percent decline.
The figure presents iSuppli’s current forecast of global semiconductor revenue.
iSuppli: Global Annual Semiconductor Revenue Forecast (Millions of US$)
Source: iSuppli, Sept. 2009“Lack of visibility from the end market and through the electronics supply chain was a major problem for semiconductor suppliers in the first quarter,” said Dale Ford, senior vice president, market intelligence services for iSuppli. “However, due to a stabilizing economic environment in the second quarter and improving supply chain visibility, semiconductor shipments rebounded as inventories were replenished and modest forward-looking purchases were made.”
Third-quarter semiconductor sales are benefitting from improved market outlooks by major OEMs in key markets such as PCs and mobile handsets.
The global economy in the second quarter was boosted by worldwide economic stimulus efforts. Although the American Recovery and Reinvestment Act (ARRA) really didn’t go into effect during the period, China’s stimulus efforts spurred a massive increase in consumer purchasing in the country, benefitting worldwide economic conditions.
Uncharted territory
While the outlook for the global semiconductor market may have gained some clarity, the industry appears to have entered uncharted territory when it comes to tracking sales trends.
“In the history of the semiconductor industry, the market has never had a cycle like this one,” Ford said. “Semiconductor sales have always been subject to a cyclical growth pattern that sees a move from a low point, through one or more supply-chain balancing periods and then to an eventual peak in revenue. However, the most recent cycle, starting in February 2006, was robbed of its peak. Just as the industry had achieved a balanced supply chain and was starting to move toward a peak, the global economic crisis drove the industry down.”
For the semiconductor industry, this means a both a long and painful downturn. While revenue began growing on a sequential basis in the second quarter of 2009, sales will not begin to increase on a year-to-year basis until May 2010. This means the industry will endure 20 months without year-over-year revenue growth, compared to the 17-month downturn that the industry experienced during the 2001-2002 decline.
While 2010 will bring a return to growth in the semiconductor industry with a 13.8 percent rise compared to 2009, the market won’t return to its 2007, pre-downturn level until 2012. Global semiconductor revenue will rise to $282.7 billion in 2012, compared to $273.4 billion in 2007.
Equipped for downturn
iSuppli forecasts that global revenue from shipments of electronic equipment will decline by 9 percent in 2009 to $1.39 trillion, down from $1.53 trillion in 2008. Growth will rebound by 5.2 percent in 2010 to reach $1.47 trillion.
EDA industry revenue down in Q2-09
SAN JOSE, USA: The EDA Consortium (EDAC) Market Statistics Service (MSS) today announced that the Electronic Design Automation (EDA) industry revenue for Q2 2009 is $1,125.5 million, a 5.6 percent sequential decline from Q1.
On a Q2/Q2 basis, EDA industry revenue declined 15.8 percent to $1,125.5 million, compared to $1,335.9 million in Q2 2008. The four-quarter moving average declined 13.9 percent.
“This recession started with the most precipitous drop in electronics industry history. Nevertheless, the normal pattern of preserving most R&D spending has been maintained by most electronics companies,” said Wally Rhines, EDAC chair and chairman and CEO of Mentor Graphics. “As the electronics industry recovers, and its R&D spending increases to come in line with its growing revenue, the EDA industry would be expected to recover as well.”
Companies that were tracked employed 26,298 professionals in Q2 2009, down 6.1 percent from the 28,004 employed in Q2 2008, and down 1.0 percent from the 26,561 employed in Q1 2009.
Revenue by product category
Computer Aided Engineering (CAE), EDA’s largest category, generated revenue of $449.7 million in Q2 2009. This represents a 12.2 percent decrease over the same period in 2008. The four-quarter moving average for CAE declined 18.6 percent.
In the next largest category, IC Physical Design and Verification, revenue decreased to $270.6 million in Q2 2009, a 12.8 percent decrease compared to Q2 2008. The four-quarter moving average declined 19.7 percent for IC Physical Design & Verification.
Printed Circuit Board and Multi-Chip Module (PCB and MCM) revenue decreased 24.1 percent compared to Q2 2008, to $105.8 million. The four-quarter moving average for PCB and MCM decreased 10.4 percent.
Semiconductor Intellectual Property (SIP) revenue totaled $221.6 million in Q2 2009, a 16.3 percent decrease compared to Q2 2008. The four-quarter moving average for SIP decreased 5.0 percent.
Services revenue was $77.8 million in Q2 2009, a decrease of 28.6 percent compared to Q2 2008. The four-quarter moving average for services increased 7.5 percent.
Revenue by consuming region
The Americas, EDA’s largest region, purchased $509 million of EDA products and services in Q2 2009, representing an 11.5 percent decrease compared to Q2 2008. The four-quarter moving average was down 14.7 percent for the region.
Revenue in Europe, the Middle East, and Africa (EMEA) was down 21.1 percent in Q2 2009 compared to Q2 2008 on revenues of $212.4 million. The four-quarter moving average for EMEA was down 14.3 percent.
Q2 2009 revenue from Japan decreased 21.5 percent to $217.8 million compared to Q2 2008. The four-quarter moving average for Japan decreased 17.9 percent.
The Asia/Pacific (APAC) region decreased to $186.3 million in Q2 2009, a 13.1 percent decrease compared to the same quarter in 2008. The four-quarter moving average declined 5.3 percent.
On a Q2/Q2 basis, EDA industry revenue declined 15.8 percent to $1,125.5 million, compared to $1,335.9 million in Q2 2008. The four-quarter moving average declined 13.9 percent.
“This recession started with the most precipitous drop in electronics industry history. Nevertheless, the normal pattern of preserving most R&D spending has been maintained by most electronics companies,” said Wally Rhines, EDAC chair and chairman and CEO of Mentor Graphics. “As the electronics industry recovers, and its R&D spending increases to come in line with its growing revenue, the EDA industry would be expected to recover as well.”
Companies that were tracked employed 26,298 professionals in Q2 2009, down 6.1 percent from the 28,004 employed in Q2 2008, and down 1.0 percent from the 26,561 employed in Q1 2009.
Revenue by product category
Computer Aided Engineering (CAE), EDA’s largest category, generated revenue of $449.7 million in Q2 2009. This represents a 12.2 percent decrease over the same period in 2008. The four-quarter moving average for CAE declined 18.6 percent.
In the next largest category, IC Physical Design and Verification, revenue decreased to $270.6 million in Q2 2009, a 12.8 percent decrease compared to Q2 2008. The four-quarter moving average declined 19.7 percent for IC Physical Design & Verification.
Printed Circuit Board and Multi-Chip Module (PCB and MCM) revenue decreased 24.1 percent compared to Q2 2008, to $105.8 million. The four-quarter moving average for PCB and MCM decreased 10.4 percent.
Semiconductor Intellectual Property (SIP) revenue totaled $221.6 million in Q2 2009, a 16.3 percent decrease compared to Q2 2008. The four-quarter moving average for SIP decreased 5.0 percent.
Services revenue was $77.8 million in Q2 2009, a decrease of 28.6 percent compared to Q2 2008. The four-quarter moving average for services increased 7.5 percent.
Revenue by consuming region
The Americas, EDA’s largest region, purchased $509 million of EDA products and services in Q2 2009, representing an 11.5 percent decrease compared to Q2 2008. The four-quarter moving average was down 14.7 percent for the region.
Revenue in Europe, the Middle East, and Africa (EMEA) was down 21.1 percent in Q2 2009 compared to Q2 2008 on revenues of $212.4 million. The four-quarter moving average for EMEA was down 14.3 percent.
Q2 2009 revenue from Japan decreased 21.5 percent to $217.8 million compared to Q2 2008. The four-quarter moving average for Japan decreased 17.9 percent.
The Asia/Pacific (APAC) region decreased to $186.3 million in Q2 2009, a 13.1 percent decrease compared to the same quarter in 2008. The four-quarter moving average declined 5.3 percent.
Common Platform Alliance qualifies Synopsys IC Validator for 32nm design rule checking
MOUNTAIN VIEW, USA: Synopsys Inc. today announced that the Common Platform technology alliance, a unique technology collaboration between IBM, Chartered Semiconductor Manufacturing and Samsung Electronics, has qualified IC Validator for 32-nanometer (nm) process design rule checking on Common Platform technology.
Synopsys and the Common Platform companies are continuing with the collaboration to complete the qualification of IC Validator at 28nm on Common Platform technology. IC Validator, the newest addition to the Galaxy Implementation Platform, is a full signoff DRC/LVS solution.
In addition, the IC Validator has been uniquely architected as an ideal add-on to IC Compiler for in-design physical verification, enabling place and route engineers to accelerate time to tapeout and improve manufacturability by enabling physical verification within the implementation flow.
This qualification enables Common Platform customers to deploy IC Validator into production use at 32nm and see benefits from the productivity advantages of in-design physical verification in conjunction with the IC Compiler place and route solution.
"We believe that in-design physical verification is essential to significantly reduce physical verification turnaround time given the complexities at emerging nodes," said Henry Law, vice president, design services division for Chartered, on behalf of the Common Platform alliance companies.
"Architected for 45nm and below process nodes, IC Validator offers a highly flexible programming language that makes runset creation at these complex nodes easy and concise. Our qualification of IC Validator confirmed its signoff accuracy and productivity benefits of in-design physical verification. Given the observed benefits, we are committed to qualifying IC Validator for the Common Platform 28nm process node."
Prevalent approaches to physical design and verification can be described as "implement-then-verify" and result in multiple iterations between design and signoff. In-design physical verification accelerates design closure by enabling sign-off quality rule checking and fixing during the design process, avoiding late stage surprises that can jeopardize project schedules.
Other benefits include incremental processing, automatic error detection and fixing, near-linear scalability across multiple CPU cores and the elimination of expensive stream-outs and stream-ins. IC Validator also offers significant automation and innovative features such as DRC error classification or DRC waiver, multi-user collaboration, customized reporting and on-the-fly error reporting that can further improve physical verification turnaround time.
While in-design physical verification is facilitated by seamless integration with IC Compiler, IC Validator's foundry-endorsed, signoff-accurate engine is its core strength. Powered by its hybrid data and command-processing engine, IC Validator is a full signoff DRC/LVS tool offering the high accuracy necessary for leading-edge process nodes, excellent scalability for efficient utilization of available hardware and high programmability for easier runset development.
For runset writers and CAD managers, IC Validator offers a flexible programming language that can cut runset size from 2 to 10x, lowering the cost of setting up, maintaining and modifying the physical verification environment.
"Common Platform technology companies have always been at the forefront in defining high-productivity flows for advanced processes," said Bijan Kiani, vice president of product marketing, design and manufacturing products at Synopsys.
"This qualification marks an important milestone in supporting leading-edge technology from the Common Platform alliance and will bring IC Validator's unique value proposition to our mutual customers and partners. We look forward to our continued collaboration towards the 28-nm qualification."
Synopsys and the Common Platform companies are continuing with the collaboration to complete the qualification of IC Validator at 28nm on Common Platform technology. IC Validator, the newest addition to the Galaxy Implementation Platform, is a full signoff DRC/LVS solution.
In addition, the IC Validator has been uniquely architected as an ideal add-on to IC Compiler for in-design physical verification, enabling place and route engineers to accelerate time to tapeout and improve manufacturability by enabling physical verification within the implementation flow.
This qualification enables Common Platform customers to deploy IC Validator into production use at 32nm and see benefits from the productivity advantages of in-design physical verification in conjunction with the IC Compiler place and route solution.
"We believe that in-design physical verification is essential to significantly reduce physical verification turnaround time given the complexities at emerging nodes," said Henry Law, vice president, design services division for Chartered, on behalf of the Common Platform alliance companies.
"Architected for 45nm and below process nodes, IC Validator offers a highly flexible programming language that makes runset creation at these complex nodes easy and concise. Our qualification of IC Validator confirmed its signoff accuracy and productivity benefits of in-design physical verification. Given the observed benefits, we are committed to qualifying IC Validator for the Common Platform 28nm process node."
Prevalent approaches to physical design and verification can be described as "implement-then-verify" and result in multiple iterations between design and signoff. In-design physical verification accelerates design closure by enabling sign-off quality rule checking and fixing during the design process, avoiding late stage surprises that can jeopardize project schedules.
Other benefits include incremental processing, automatic error detection and fixing, near-linear scalability across multiple CPU cores and the elimination of expensive stream-outs and stream-ins. IC Validator also offers significant automation and innovative features such as DRC error classification or DRC waiver, multi-user collaboration, customized reporting and on-the-fly error reporting that can further improve physical verification turnaround time.
While in-design physical verification is facilitated by seamless integration with IC Compiler, IC Validator's foundry-endorsed, signoff-accurate engine is its core strength. Powered by its hybrid data and command-processing engine, IC Validator is a full signoff DRC/LVS tool offering the high accuracy necessary for leading-edge process nodes, excellent scalability for efficient utilization of available hardware and high programmability for easier runset development.
For runset writers and CAD managers, IC Validator offers a flexible programming language that can cut runset size from 2 to 10x, lowering the cost of setting up, maintaining and modifying the physical verification environment.
"Common Platform technology companies have always been at the forefront in defining high-productivity flows for advanced processes," said Bijan Kiani, vice president of product marketing, design and manufacturing products at Synopsys.
"This qualification marks an important milestone in supporting leading-edge technology from the Common Platform alliance and will bring IC Validator's unique value proposition to our mutual customers and partners. We look forward to our continued collaboration towards the 28-nm qualification."
Tuesday, 29 September 2009
Semiconductor inventories fall below optimal levels
EL SEGUNDO, USA: After swelling to major excess levels in 2008, global semiconductor inventories in the second quarter of 2009 dwindled to lean, but appropriate, levels, according to iSuppli Corp.
iSuppli believes that in the third quarter, semiconductor suppliers have moved to build inventory to achieve supply and demand equilibrium. As a result, global chip revenue in the third quarter likely will rise by 3 percent more than actual demand would dictate, creating an artificial bump in sales for the industry.
In the second quarter, Days of Inventory (DOI) at semiconductor suppliers fell short of optimal levels by 6.1 percent This represents a vast improvement over the fourth quarter of 2008, when DOI exceeded equilibrium by 14.8 percent.
“Having seen their inventories swell to excess in 2008, semiconductor suppliers acted quickly to reduce inventory,” said Carlo Ciriello, financial analyst for iSuppli. “However the pendulum swung too far in the opposite direction in the second quarter, leaving inventories at lean levels.”
Despite the below-target semiconductor inventories in the second quarter, there is no imminent danger of chip shortages at this time. With global semiconductor factory utilization at extremely low levels, suppliers can easily boost their manufacturing to meet demand.
In fact, the inventory correction has come as a boon to semiconductor stocks. The Semiconductor HOLDRS Trust index of 18 US chip companies’ stock prices rose by 55 percent during the six-month period from March to September, in concert with the drop in inventories.
While the ongoing inventory adjustment may be good news for the supply chain, the semiconductor industry is likely to suffer a harsh return to reality after inventory replenishment concludes.
“The inventory restocking effort will run its course by the end of the third quarter, leaving sales to be driven only by actual end-market demand,” Ciriello said. “This will bring an end to the artificial boost in sales and sentiment generated by the inventory rebuilding effort.”
The figure presents iSuppli’s estimate of the percentage of semiconductor DOI relative to seasonally adjusted, historical DOI targets.
Source: iSuppli, USA
Optimal DOI is calculated by iSuppli based on semiconductor demand, and is adjusted for factors including seasonality, revenue fluctuations and margins.
iSuppli believes that in the third quarter, semiconductor suppliers have moved to build inventory to achieve supply and demand equilibrium. As a result, global chip revenue in the third quarter likely will rise by 3 percent more than actual demand would dictate, creating an artificial bump in sales for the industry.
In the second quarter, Days of Inventory (DOI) at semiconductor suppliers fell short of optimal levels by 6.1 percent This represents a vast improvement over the fourth quarter of 2008, when DOI exceeded equilibrium by 14.8 percent.
“Having seen their inventories swell to excess in 2008, semiconductor suppliers acted quickly to reduce inventory,” said Carlo Ciriello, financial analyst for iSuppli. “However the pendulum swung too far in the opposite direction in the second quarter, leaving inventories at lean levels.”
Despite the below-target semiconductor inventories in the second quarter, there is no imminent danger of chip shortages at this time. With global semiconductor factory utilization at extremely low levels, suppliers can easily boost their manufacturing to meet demand.
In fact, the inventory correction has come as a boon to semiconductor stocks. The Semiconductor HOLDRS Trust index of 18 US chip companies’ stock prices rose by 55 percent during the six-month period from March to September, in concert with the drop in inventories.
While the ongoing inventory adjustment may be good news for the supply chain, the semiconductor industry is likely to suffer a harsh return to reality after inventory replenishment concludes.
“The inventory restocking effort will run its course by the end of the third quarter, leaving sales to be driven only by actual end-market demand,” Ciriello said. “This will bring an end to the artificial boost in sales and sentiment generated by the inventory rebuilding effort.”
The figure presents iSuppli’s estimate of the percentage of semiconductor DOI relative to seasonally adjusted, historical DOI targets.
Source: iSuppli, USAOptimal DOI is calculated by iSuppli based on semiconductor demand, and is adjusted for factors including seasonality, revenue fluctuations and margins.
Global number of GPS IC shipments to approach 450mn in 2010
LONDON, UK: While GPS IC shipment growth slowed during 2009, next year should see a 30 percent increase in shipments.
The unabated interest in GPS-enabled smartphones during the recession has been a life-saver for the GPS IC industry, and future growth will be fueled by the integration of GPS in feature phones across Europe and Asia, and its appearance in an ever-growing number of new consumer form factors such as MIDs, netbooks, media players, gaming consoles, GPS watches, digital cameras, and connected cars.
“With GPS well on the way to becoming a ubiquitous feature across the mobile consumer space, GPS chipsets are subject to increasingly challenging requirements,” says ABI Research practice director Dominique Bonte.
“Many new LBS services such as social networking, tracking, logging, and geo-tagging require always-on, instant operation even in the absence of network assistance and without sacrificing battery life or increasing cost. This has prompted both u-blox and CSR to design their new u-blox 6 and SiRFStar IV / SiRFaware architectures, optimized for battery-powered portable devices.”
Other important trends include the adoption of post-processing for geo-tagging and tracking applications as implemented by u-blox in its “Capture & Process” technology, support for new GNSS systems such as Glonass and Galileo, jammer remover functionality, sensor support, System-on-Chip (SoC) implementations such as STMicroelectronics’ Cartesio+ application processor and Broadcom’s BCM4760 “PND-on-a-chip”, and software-based GPS (Fastrax).
The unabated interest in GPS-enabled smartphones during the recession has been a life-saver for the GPS IC industry, and future growth will be fueled by the integration of GPS in feature phones across Europe and Asia, and its appearance in an ever-growing number of new consumer form factors such as MIDs, netbooks, media players, gaming consoles, GPS watches, digital cameras, and connected cars.
“With GPS well on the way to becoming a ubiquitous feature across the mobile consumer space, GPS chipsets are subject to increasingly challenging requirements,” says ABI Research practice director Dominique Bonte.
“Many new LBS services such as social networking, tracking, logging, and geo-tagging require always-on, instant operation even in the absence of network assistance and without sacrificing battery life or increasing cost. This has prompted both u-blox and CSR to design their new u-blox 6 and SiRFStar IV / SiRFaware architectures, optimized for battery-powered portable devices.”
Other important trends include the adoption of post-processing for geo-tagging and tracking applications as implemented by u-blox in its “Capture & Process” technology, support for new GNSS systems such as Glonass and Galileo, jammer remover functionality, sensor support, System-on-Chip (SoC) implementations such as STMicroelectronics’ Cartesio+ application processor and Broadcom’s BCM4760 “PND-on-a-chip”, and software-based GPS (Fastrax).
NXP intros intelligent switches supporting HDMI 1.4
EINDHOVEN, THE NETHERLANDS: NXP Semiconductors unveiled intelligent switches supporting the new HDMI 1.4 specification released in June 2009.
The NXP TDA19997 and TDA19998 smart switches support the Audio Return Channel (ARC) feature, a new option introduced in the HDMI 1.4 release, which reduces the number of cables required to deliver audio upstream for processing and playback.
Building on the success of previous HDMI smart switches from NXP, the TDA19997 and TDA19998 also include support for all mandatory 3D over HDMI features. NXP is the one of the first semiconductor companies to deliver silicon supporting HDMI 1.4.
The new Audio Return Channel specified in HDMI 1.4 enables HDTVs directly receiving audio and video content to send the audio stream to an amplification system over the HDMI cable, eliminating the need for an extra cable.
The NXP TDA19997 and TDA19998 smart switches also include built-in auto-adaptive equalizers that can handle up to four HDMI 1.4 inputs, automatically maintaining audio-visual quality over HDMI cables up to 30m in length.
Their highly integrated design offers a compelling solution that eliminates the need for external components, reducing the overall Bill of Materials for TV manufacturers while delivering an enhanced viewing experience. The TDA19997 and TDA19998 are embedded with five EDID extensions for HDMI and VGA, as well as high levels of ESD protection.
“By the end of this year, nearly one billion HDMI-ready systems will have been shipped worldwide. With the Audio Return Channel, HDTV viewers will be able to enjoy top quality sound, without cable clutter,” said Denis Marsault, media interfaces product line, NXP Semiconductors. “By bringing our HDMI 1.4 smart switches to market quickly, we’re demonstrating our commitment to helping TV manufacturers deliver exceptional high-definition entertainment with the most energy-efficient solutions that fit easily into the home theater environment.”
The TDA19998 smart switches take advantage of NXP’s patented F3 (Fast, Fair and Faithful) architecture, which guarantees fast port switching between HDMI devices while keeping a secured HDCP-protected HDMI stream at the output. The F3 architecture also enables best-in-class power efficiency of all system in both active and stand-by modes.
The NXP TDA19997 and TDA19998 comprise the second generation of NXP’s highly popular HDMI smart switches, and are part of a wide portfolio of highly scalable solutions for the digital home, enabling TV makers to target a broad audience – from the most price-sensitive segments to the most feature-oriented markets.
The TDA19997 and TDA19998 are pin-to-pin compatible with previous generation smart switches from NXP, and provide TV makers with unprecedented flexibility in adapting to end user demand in terms of price, features and power consumption, as well as operator and content providers’ requirements for security and performance.
Availability
Engineering samples of the TDA19997 are available immediately from NXP. The TDA19998 smart switches will be available in mid-October 2009.
The NXP TDA19997 and TDA19998 smart switches support the Audio Return Channel (ARC) feature, a new option introduced in the HDMI 1.4 release, which reduces the number of cables required to deliver audio upstream for processing and playback.
Building on the success of previous HDMI smart switches from NXP, the TDA19997 and TDA19998 also include support for all mandatory 3D over HDMI features. NXP is the one of the first semiconductor companies to deliver silicon supporting HDMI 1.4.
The new Audio Return Channel specified in HDMI 1.4 enables HDTVs directly receiving audio and video content to send the audio stream to an amplification system over the HDMI cable, eliminating the need for an extra cable.
The NXP TDA19997 and TDA19998 smart switches also include built-in auto-adaptive equalizers that can handle up to four HDMI 1.4 inputs, automatically maintaining audio-visual quality over HDMI cables up to 30m in length.
Their highly integrated design offers a compelling solution that eliminates the need for external components, reducing the overall Bill of Materials for TV manufacturers while delivering an enhanced viewing experience. The TDA19997 and TDA19998 are embedded with five EDID extensions for HDMI and VGA, as well as high levels of ESD protection.
“By the end of this year, nearly one billion HDMI-ready systems will have been shipped worldwide. With the Audio Return Channel, HDTV viewers will be able to enjoy top quality sound, without cable clutter,” said Denis Marsault, media interfaces product line, NXP Semiconductors. “By bringing our HDMI 1.4 smart switches to market quickly, we’re demonstrating our commitment to helping TV manufacturers deliver exceptional high-definition entertainment with the most energy-efficient solutions that fit easily into the home theater environment.”
The TDA19998 smart switches take advantage of NXP’s patented F3 (Fast, Fair and Faithful) architecture, which guarantees fast port switching between HDMI devices while keeping a secured HDCP-protected HDMI stream at the output. The F3 architecture also enables best-in-class power efficiency of all system in both active and stand-by modes.
The NXP TDA19997 and TDA19998 comprise the second generation of NXP’s highly popular HDMI smart switches, and are part of a wide portfolio of highly scalable solutions for the digital home, enabling TV makers to target a broad audience – from the most price-sensitive segments to the most feature-oriented markets.
The TDA19997 and TDA19998 are pin-to-pin compatible with previous generation smart switches from NXP, and provide TV makers with unprecedented flexibility in adapting to end user demand in terms of price, features and power consumption, as well as operator and content providers’ requirements for security and performance.
Availability
Engineering samples of the TDA19997 are available immediately from NXP. The TDA19998 smart switches will be available in mid-October 2009.
EVE’s ZeBu-Server proven fastest emulator on the market
SAN JOSE, USA: EVE, a leader in hardware/software co-verification, noted that its new emulation system ZeBu-Server can emulate a single design at a speed of up to 30 megahertz (MHz), based on recent benchmarks.
Additional benchmarks proved that ZeBu-Server can emulate a one-billion gate design at a speed of one MHz, 100-million gates at speeds reaching five MHz and a 10-million gate design at a speed of 10MHz. It is able to communicate with multiple host PCs at up to three gigabits per second (Gbps) per machine.
This enables a video transactor to display high-definition television images at multiple frames per second or to download the entire system-on-chip (SoC) software content in the emulator in a fraction of second.
“Execution speed is critical for large SoCs where hardware integration and software applications require fast initialization and billions of cycles to be executed in the shortest time,” says Lauro Rizzatti, EVE’s vice president of worldwide marketing.
“ZeBu-Server’s performance, high-capacity, automated compilation and interactive debugging capabilities make it the perfect vehicle for verifying high-end graphics and processor chips, applications where custom chip-based emulators struggle to reach speeds of a few hundred kilohertz.”
Priced from $150,000 or less than a penny per gate for large configurations, ZeBu-Server offers a high level of automation, short compile time, multi-user capabilities and greater execution speed than previous generations of emulators. It is suitable for all SoC verification needs across the entire development cycle, from hardware verification, hardware/software integration to embedded software validation.
Additional benchmarks proved that ZeBu-Server can emulate a one-billion gate design at a speed of one MHz, 100-million gates at speeds reaching five MHz and a 10-million gate design at a speed of 10MHz. It is able to communicate with multiple host PCs at up to three gigabits per second (Gbps) per machine.
This enables a video transactor to display high-definition television images at multiple frames per second or to download the entire system-on-chip (SoC) software content in the emulator in a fraction of second.
“Execution speed is critical for large SoCs where hardware integration and software applications require fast initialization and billions of cycles to be executed in the shortest time,” says Lauro Rizzatti, EVE’s vice president of worldwide marketing.
“ZeBu-Server’s performance, high-capacity, automated compilation and interactive debugging capabilities make it the perfect vehicle for verifying high-end graphics and processor chips, applications where custom chip-based emulators struggle to reach speeds of a few hundred kilohertz.”
Priced from $150,000 or less than a penny per gate for large configurations, ZeBu-Server offers a high level of automation, short compile time, multi-user capabilities and greater execution speed than previous generations of emulators. It is suitable for all SoC verification needs across the entire development cycle, from hardware verification, hardware/software integration to embedded software validation.
Leading foundry selects Nova optical CD for 22/32nm
REHOVOT, ISRAEL: Nova Measuring Instruments Ltd, a provider of leading edge stand-alone metrology and the market leader of integrated metrology solutions to the semiconductor process control market, announced that its NovaT500 and NovaMARS have been selected as the metrology solution of record for both the 22nm and 32nm technology nodes, at one of the world's leading foundries.
The selection defines Nova as the sole provider of Stand Alone Optical CD metrology for both back end and front end of line applications including Lithography, Etch, CMP and advanced thin film applications. The Company expects to receive several stand alone tool orders in the coming quarters.
"The selection of Nova's metrology solution by one of the world's technology leaders is clear recognition of the technology leadership we have attained in the stand alone Optical CD market over the past few years. Our solution was evaluated against competing technologies over the past 12 months in the most advanced and challenging development environments and was able to cope with the most complicated next generation applications across several key areas of the fab", commented Dr. Boaz Brill, VP Technology Development at Nova.
"Winning the support of this particular customer, who is known as a technology leader and an industry benchmark, is of huge strategic value to the Company. With this third major foundry win we further expand our reach into this growing segment, an area where most capital spending is expected to continue in the coming years", commented Gabi Seligsohn, President & CEO at Nova.
The NovaT500 provides extremely high throughput of 250 Wafers Per Hour (13 measurement sites). Based on Nova's patented Normal Incidence Spectral Reflectometry, the NovaT500 redesigned optics improve metrology precision by 30 percent over current generation NovaScan 3090Next.
This flexible platform allows up to three Measurement Units to be installed on the same tool, providing an easy and cost effective path to upgrades as well as adding other metrology capabilities as they become available. Combined with NovaMARS, advanced application development software, the NovaT500 has the ability to measure fine profile parameters on complex 3D test structures as well as in the device.
The selection defines Nova as the sole provider of Stand Alone Optical CD metrology for both back end and front end of line applications including Lithography, Etch, CMP and advanced thin film applications. The Company expects to receive several stand alone tool orders in the coming quarters.
"The selection of Nova's metrology solution by one of the world's technology leaders is clear recognition of the technology leadership we have attained in the stand alone Optical CD market over the past few years. Our solution was evaluated against competing technologies over the past 12 months in the most advanced and challenging development environments and was able to cope with the most complicated next generation applications across several key areas of the fab", commented Dr. Boaz Brill, VP Technology Development at Nova.
"Winning the support of this particular customer, who is known as a technology leader and an industry benchmark, is of huge strategic value to the Company. With this third major foundry win we further expand our reach into this growing segment, an area where most capital spending is expected to continue in the coming years", commented Gabi Seligsohn, President & CEO at Nova.
The NovaT500 provides extremely high throughput of 250 Wafers Per Hour (13 measurement sites). Based on Nova's patented Normal Incidence Spectral Reflectometry, the NovaT500 redesigned optics improve metrology precision by 30 percent over current generation NovaScan 3090Next.
This flexible platform allows up to three Measurement Units to be installed on the same tool, providing an easy and cost effective path to upgrades as well as adding other metrology capabilities as they become available. Combined with NovaMARS, advanced application development software, the NovaT500 has the ability to measure fine profile parameters on complex 3D test structures as well as in the device.
EV Group's GEMINI wafer bonder selected by RFID/USN Center for 3D MEMS manufacturing
ST. FLORIAN, AUSTRIA: EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, announced that the RFID/USN Center has selected EVG's fully automated GEMINI wafer bonding system for stacked 3D MEMS device development.
Located in Incheon, Korea, RFID/USN is a leading MEMS foundry that offers manufacturing services for companies to initiate production processes with capabilities to segue from R&D to high volume. This order represents a significant win for EVG, marking its first foray into the prestigious institute's manufacturing line-up.
"As a foundry service provider, we strive to offer our customers with cutting-edge technologies to support their 3D MEMS production needs, and as such, require a flexible system that can adapt to a wide range of requirements," said RFID/USN Center's executive director, Dong-suk Han.
"Given the stringent demands of the leading-edge MEMS market, particularly for 3D devices, we evaluated a number of bonding solutions on the market for MEMS production, and in the end, chose EVG's GEMINI not only for its superior reliability and high-volume capabilities, but also for its flexibility and extendibility. The GEMINI enables us to quickly adjust the chuck to handle both 6- and 8-inch wafers, offering the highest available uptime in the market to ensure around-the-clock operation--a significant factor in our decision."
Commenting on the announcement, Paul Lindner, EVG's executive technology director noted: "This opportunity to cooperate with a leading Korean MEMS foundry, such as the RFID/USN Center, is an important step for EVG as we continue to expand our footprint in the growing Korean market. Following the opening of our Korean subsidiary in the summer of 2008, we have witnessed positive momentum in the market, and are fully committed to serving the needs of the region in the future.
Lindner added, "We have long served the MEMS market, and this order win is further testament to the strength of our solutions to address the production demands of advanced technologies, such as 3D MEMS devices."
EVG's GEMINI platform is a field-proven, production manufacturing solution for high-volume wafer bonding applications for MEMS, 3D IC integration and advanced packaging, as well as compound semiconductor applications.
Its modular design offers customers a highly flexible and extendible platform that enables customers the opportunity to incorporate pre-processing options such as cleaning and plasma activation modules, as well as additional bond chambers to augment throughput.
Additionally, this fully automated wafer bonding system integrates EVG's SmartView aligner, which yields precision alignment accuracy, as well as wafer handling expertise into one wafer bonding platform. The GEMINI maintains an installed base of more than 100, contributing to EVG's 75-percent market share dominance in wafer bonding.
Located in Incheon, Korea, RFID/USN is a leading MEMS foundry that offers manufacturing services for companies to initiate production processes with capabilities to segue from R&D to high volume. This order represents a significant win for EVG, marking its first foray into the prestigious institute's manufacturing line-up.
"As a foundry service provider, we strive to offer our customers with cutting-edge technologies to support their 3D MEMS production needs, and as such, require a flexible system that can adapt to a wide range of requirements," said RFID/USN Center's executive director, Dong-suk Han.
"Given the stringent demands of the leading-edge MEMS market, particularly for 3D devices, we evaluated a number of bonding solutions on the market for MEMS production, and in the end, chose EVG's GEMINI not only for its superior reliability and high-volume capabilities, but also for its flexibility and extendibility. The GEMINI enables us to quickly adjust the chuck to handle both 6- and 8-inch wafers, offering the highest available uptime in the market to ensure around-the-clock operation--a significant factor in our decision."
Commenting on the announcement, Paul Lindner, EVG's executive technology director noted: "This opportunity to cooperate with a leading Korean MEMS foundry, such as the RFID/USN Center, is an important step for EVG as we continue to expand our footprint in the growing Korean market. Following the opening of our Korean subsidiary in the summer of 2008, we have witnessed positive momentum in the market, and are fully committed to serving the needs of the region in the future.
Lindner added, "We have long served the MEMS market, and this order win is further testament to the strength of our solutions to address the production demands of advanced technologies, such as 3D MEMS devices."
EVG's GEMINI platform is a field-proven, production manufacturing solution for high-volume wafer bonding applications for MEMS, 3D IC integration and advanced packaging, as well as compound semiconductor applications.
Its modular design offers customers a highly flexible and extendible platform that enables customers the opportunity to incorporate pre-processing options such as cleaning and plasma activation modules, as well as additional bond chambers to augment throughput.
Additionally, this fully automated wafer bonding system integrates EVG's SmartView aligner, which yields precision alignment accuracy, as well as wafer handling expertise into one wafer bonding platform. The GEMINI maintains an installed base of more than 100, contributing to EVG's 75-percent market share dominance in wafer bonding.
NVIDIA, Microsoft ally on high performance GPU computing
SANTA CLARA, USA: NVIDIA announced work with Microsoft to promote NVIDIA Tesla graphics processing units (GPUs) for high performance parallel computing using the Windows HPC Server 2008 operating system.
"The coupling of GPUs and CPUs illustrates the enormous power and opportunity of multicore co-processing," said Dan Reed, corporate vice president of Extreme Computing at Microsoft. "NVIDIA's work with Microsoft and the Windows HPC Server platform, is helping enable scientists and researchers in many fields achieve supercomputer performance on diverse applications."
NVIDIA Research developed several GPU-enabled applications on the Windows HPC Server 2008 platform, such as a ray tracing application that can be used for advanced photo-realistic modeling of automobiles. Related to this, NVIDIA worked with Microsoft Research to install a large Tesla GPU computing cluster and is studying applications that are optimized for the GPU.
In addition, a whole range of enterprise applications - such as data mining, machine learning and business intelligence, as well as scientific applications like molecular dynamics, financial computing and seismic processing - are taking advantage of the massively parallel CUDA(TM) architecture on which NVIDIA's GPUs are based to achieve higher levels of productivity.
The CUDA architecture enables developers to use the CPU and the GPU together in a co-processing model. Compute-intensive sections of an application use the parallel computing capabilities of the GPU, while the sequential part of an application's code runs on the CPU.
"The combination of GPUs and the Windows platform has been a great benefit to our VMD (Visual Molecular Dynamics) user community, bringing advanced molecular visualization and analysis capabilities to thousands of users," said John Stone, senior research programmer at the University of Illinois Urbana-Champaign. "As we move toward even larger biomolecular structures, GPUs will become increasingly important as they bring even more computational power to bear on what will be highly parallelizable computational problems."
"The scientific community was one of the first to realize the potential of the GPU to transform its work, observing speedups ranging from 20 to 200 times while using a range of compute-intensive applications," said Andy Keane, general manager of NVIDIA's Tesla business. "Researchers are increasingly using Windows on workstations and in data centers due to strong development tools like Microsoft Visual Studio, its ease of system management and its lower total cost of ownership."
NVIDIA Tesla high-performance GPU computing products support Windows XP and Windows Vista in the workstation and Windows Server 2003 and Windows Server 2008 in the data center. Tesla C1060 and S1070 GPU computing products are available from most major system vendors including Cray, Dell, HP and Lenovo.
"The coupling of GPUs and CPUs illustrates the enormous power and opportunity of multicore co-processing," said Dan Reed, corporate vice president of Extreme Computing at Microsoft. "NVIDIA's work with Microsoft and the Windows HPC Server platform, is helping enable scientists and researchers in many fields achieve supercomputer performance on diverse applications."
NVIDIA Research developed several GPU-enabled applications on the Windows HPC Server 2008 platform, such as a ray tracing application that can be used for advanced photo-realistic modeling of automobiles. Related to this, NVIDIA worked with Microsoft Research to install a large Tesla GPU computing cluster and is studying applications that are optimized for the GPU.
In addition, a whole range of enterprise applications - such as data mining, machine learning and business intelligence, as well as scientific applications like molecular dynamics, financial computing and seismic processing - are taking advantage of the massively parallel CUDA(TM) architecture on which NVIDIA's GPUs are based to achieve higher levels of productivity.
The CUDA architecture enables developers to use the CPU and the GPU together in a co-processing model. Compute-intensive sections of an application use the parallel computing capabilities of the GPU, while the sequential part of an application's code runs on the CPU.
"The combination of GPUs and the Windows platform has been a great benefit to our VMD (Visual Molecular Dynamics) user community, bringing advanced molecular visualization and analysis capabilities to thousands of users," said John Stone, senior research programmer at the University of Illinois Urbana-Champaign. "As we move toward even larger biomolecular structures, GPUs will become increasingly important as they bring even more computational power to bear on what will be highly parallelizable computational problems."
"The scientific community was one of the first to realize the potential of the GPU to transform its work, observing speedups ranging from 20 to 200 times while using a range of compute-intensive applications," said Andy Keane, general manager of NVIDIA's Tesla business. "Researchers are increasingly using Windows on workstations and in data centers due to strong development tools like Microsoft Visual Studio, its ease of system management and its lower total cost of ownership."
NVIDIA Tesla high-performance GPU computing products support Windows XP and Windows Vista in the workstation and Windows Server 2003 and Windows Server 2008 in the data center. Tesla C1060 and S1070 GPU computing products are available from most major system vendors including Cray, Dell, HP and Lenovo.
TI opens world's most advanced analog manufacturing facility in the US
RICHARDSON, USA: Texas Instruments Inc. (TI) announced the opening of its manufacturing facility in Richardson, Texas. The company expects to begin moving equipment into the facility in October.
To view the Multimedia News Release, go to: http://www.prnewswire.com/mnr/ti/39147
Known as RFAB, ("R" for Richardson, "FAB" for fabrication), the fab will be the world's only production facility to use 300-millimeter (12-inch) silicon wafers to manufacture analog chips, which are essential components in virtually all electronics.
The facility will give TI a strategic advantage in high-volume production because thousands of analog chips can be etched onto each of these wafers, more than double the number on the more commonly used and smaller 200-millimeter wafers.
"The time is right for this investment," said Rich Templeton, TI's chairman, president and CEO. "Customer demand for analog chips is growing, and there's tremendous desire to save energy and protect the environment. The chips produced here will help our customers make thousands of electronic products that are more energy-efficient. It is significant that these devices will be made here, in North Texas, in one of the industry's most environmentally responsible fabs."
The facility will produce analog integrated circuits based on TI's proprietary process. Customers will use these chips in electronics ranging from smartphones and netbooks, to telecom and computing systems.
At a ribbon-cutting ceremony with local and state officials, Templeton said TI plans to ship the first chips from this facility by the end of 2010. When the first phase of equipment is ramped and producing at full capacity, the facility will be capable of shipping more than $1 billion worth of analog chips per year.
Hiring will begin immediately for 250 jobs in RFAB. "These are high-quality, well-paying engineering, manufacturing and administrative jobs for our North Texas region. The infrastructure that a facility like this requires will create other indirect jobs with suppliers and support services," said Templeton.
"We want to thank our great partners in Richardson, Dallas, Plano and Austin who helped us make this happen," Templeton said, referring to the City of Richardson, Collin County, the Plano Independent School District and the Collin County Community College District.
"Texas Instruments' decision to again invest in Texas is yet another example of how, even during these economic times, the Lone Star State remains the top choice for companies looking to expand," Gov. Rick Perry said. "Our combination of a predictable regulatory climate, low taxation and a world-class workforce that is well prepared to fill the hundreds of new high-technology jobs TI will be bringing to the area."
Recent expansions
The opening of RFAB is the most recent in a series of manufacturing expansions by TI. Earlier this year, TI opened Clark, an assembly and test facility in the Philippines. TI also has been installing new test equipment at several other locations, and is in the process of installing newly acquired 200-mm manufacturing equipment for analog chip production at sites around the world, including Dallas.
Local education benefits
Local education has benefitted from TI's decision to build the fab in Richardson. As part of the original agreement between community and state partners, the nearby University of Texas at Dallas will receive a total of $300 million from the Texas Enterprise Fund, the Texas General Land Office, the UT System, and private donors for improvement of its engineering and research programs.
"Texas Instruments has been a remarkable partner with education at all levels," said Dr. David E. Daniel, president of UT Dallas. "The impact of the RFAB's creation on UT Dallas has been dramatic in terms of recognition and research activity. This project's high profile played a direct role in our most recent efforts to reach for what many call Tier One status--our aspiration to become a nationally recognized research university. We look forward to partnering with Texas Instruments and the rest of our community as we grow toward this stature in service to the Dallas area and the region."
Green model
RFAB has been an important model of green construction. It was the first semiconductor facility to achieve Gold certification with the US Green Building Council's Leadership in Energy and Environmental Design (LEED) program. TI has applied knowledge from the RFAB designs to other facilities all over the world.
To view the Multimedia News Release, go to: http://www.prnewswire.com/mnr/ti/39147
Known as RFAB, ("R" for Richardson, "FAB" for fabrication), the fab will be the world's only production facility to use 300-millimeter (12-inch) silicon wafers to manufacture analog chips, which are essential components in virtually all electronics.
The facility will give TI a strategic advantage in high-volume production because thousands of analog chips can be etched onto each of these wafers, more than double the number on the more commonly used and smaller 200-millimeter wafers.
"The time is right for this investment," said Rich Templeton, TI's chairman, president and CEO. "Customer demand for analog chips is growing, and there's tremendous desire to save energy and protect the environment. The chips produced here will help our customers make thousands of electronic products that are more energy-efficient. It is significant that these devices will be made here, in North Texas, in one of the industry's most environmentally responsible fabs."
The facility will produce analog integrated circuits based on TI's proprietary process. Customers will use these chips in electronics ranging from smartphones and netbooks, to telecom and computing systems.
At a ribbon-cutting ceremony with local and state officials, Templeton said TI plans to ship the first chips from this facility by the end of 2010. When the first phase of equipment is ramped and producing at full capacity, the facility will be capable of shipping more than $1 billion worth of analog chips per year.
Hiring will begin immediately for 250 jobs in RFAB. "These are high-quality, well-paying engineering, manufacturing and administrative jobs for our North Texas region. The infrastructure that a facility like this requires will create other indirect jobs with suppliers and support services," said Templeton.
"We want to thank our great partners in Richardson, Dallas, Plano and Austin who helped us make this happen," Templeton said, referring to the City of Richardson, Collin County, the Plano Independent School District and the Collin County Community College District.
"Texas Instruments' decision to again invest in Texas is yet another example of how, even during these economic times, the Lone Star State remains the top choice for companies looking to expand," Gov. Rick Perry said. "Our combination of a predictable regulatory climate, low taxation and a world-class workforce that is well prepared to fill the hundreds of new high-technology jobs TI will be bringing to the area."
Recent expansions
The opening of RFAB is the most recent in a series of manufacturing expansions by TI. Earlier this year, TI opened Clark, an assembly and test facility in the Philippines. TI also has been installing new test equipment at several other locations, and is in the process of installing newly acquired 200-mm manufacturing equipment for analog chip production at sites around the world, including Dallas.
Local education benefits
Local education has benefitted from TI's decision to build the fab in Richardson. As part of the original agreement between community and state partners, the nearby University of Texas at Dallas will receive a total of $300 million from the Texas Enterprise Fund, the Texas General Land Office, the UT System, and private donors for improvement of its engineering and research programs.
"Texas Instruments has been a remarkable partner with education at all levels," said Dr. David E. Daniel, president of UT Dallas. "The impact of the RFAB's creation on UT Dallas has been dramatic in terms of recognition and research activity. This project's high profile played a direct role in our most recent efforts to reach for what many call Tier One status--our aspiration to become a nationally recognized research university. We look forward to partnering with Texas Instruments and the rest of our community as we grow toward this stature in service to the Dallas area and the region."
Green model
RFAB has been an important model of green construction. It was the first semiconductor facility to achieve Gold certification with the US Green Building Council's Leadership in Energy and Environmental Design (LEED) program. TI has applied knowledge from the RFAB designs to other facilities all over the world.
DA NanoMaterials opens Asia headquarters and advanced technology center in Taiwan
HSINCHU, TAIWAN: DuPont Air Products NanoMaterials L.L.C. [DA NanoMaterials], a 50/50 joint venture of DuPont and Air Products, and a leading supplier of chemical mechanical planarization (CMP) slurries to the semiconductor fabrication industry, announced the opening of its new Asia Headquarters in Jhudong Township, Taiwan, just outside Hsinchu Science Park. As part of the new Asia Headquarters, DA NanoMaterials has also built a new, state-of-the-art 300mm-capable Advanced Technology Center (ATEC).
"We made the decision to base our Asia Headquarters and Advanced Technology Center in Taiwan, due to our desire to be closer to our customers in the region," said Ed Shober, chief executive officer of DA NanoMaterials.
"Despite the current difficult economic environment, we view Asia, and especially Taiwan, as strong growth markets for CMP slurries. We wish to better position DA NanoMaterials for closer collaboration with our Asian customers, so we are very pleased to be making this significant investment in Taiwan."
The ATEC, which is now operational, is a Hsinchu-based 300mm-capable laboratory and technical center which is dedicated to developing and optimizing advanced CMP processes and consumable sets, and providing timely technical support to customers. This facility houses a state-of-the-art laboratory featuring 300mm CMP and defect metrology equipment, as well as an advanced chemical formulation laboratory to support product development and optimization.
"For a long time, CMP slurry users have sought increased technical support to help them reduce costs," said Dr. Saifi Usmani, vice president of Marketing, Business Development and Technology of DA NanoMaterials.
"With its advanced capabilities, we believe ATEC will become the first choice for technical support of CMP slurries in the Asia region. DA NanoMaterials is continuously evaluating ways to meet its customers' needs better and faster as we look to the future, and this new facility is specifically designed to add value for them."
DA NanoMaterials continues to provide truly innovative products that deliver superior performance reliably with reduced total cost of ownership.
"We made the decision to base our Asia Headquarters and Advanced Technology Center in Taiwan, due to our desire to be closer to our customers in the region," said Ed Shober, chief executive officer of DA NanoMaterials.
"Despite the current difficult economic environment, we view Asia, and especially Taiwan, as strong growth markets for CMP slurries. We wish to better position DA NanoMaterials for closer collaboration with our Asian customers, so we are very pleased to be making this significant investment in Taiwan."
The ATEC, which is now operational, is a Hsinchu-based 300mm-capable laboratory and technical center which is dedicated to developing and optimizing advanced CMP processes and consumable sets, and providing timely technical support to customers. This facility houses a state-of-the-art laboratory featuring 300mm CMP and defect metrology equipment, as well as an advanced chemical formulation laboratory to support product development and optimization.
"For a long time, CMP slurry users have sought increased technical support to help them reduce costs," said Dr. Saifi Usmani, vice president of Marketing, Business Development and Technology of DA NanoMaterials.
"With its advanced capabilities, we believe ATEC will become the first choice for technical support of CMP slurries in the Asia region. DA NanoMaterials is continuously evaluating ways to meet its customers' needs better and faster as we look to the future, and this new facility is specifically designed to add value for them."
DA NanoMaterials continues to provide truly innovative products that deliver superior performance reliably with reduced total cost of ownership.
Magma broadens support for TSMC processes
SAN JOSE, USA: Magma Design Automation Inc. announced that Quartz DRC and Quartz LVS rule decks are available for TSMC 180-nanometer (nm) process technologies. With this addition, designers can now download 40-nm, 65-nm, 90-nm, 130-nm and 180-nm rule decks for Quartz DRC and Quartz LVS from the TSMC-Online website.
"We have been working with Magma's Quartz DRC and Quartz LVS for advanced process nodes for several years, and have tested their accuracy using the same rigorous testing procedures we use for all DRC and LVS tools," said Tom Quan, deputy director of Design Service Marketing at TSMC. "In response to customer demand, we have now expanded support for Quartz DRC and Quartz LVS to include 180 nm."
Quartz DRC and Quartz LVS are architected to process integrated circuit (IC) designs of any size, at any technology node, in the least amount of time. Magma's is the first truly scalable physical verification solution, able to provide turnaround time that is up to an order of magnitude faster than existing solutions.
The Quartz tools are fully compatible with third-party IC implementation flows and can read file formats used by traditional physical verification tools.
"TSMC has been a key foundry partner with Magma, and our mutual customers have used Quartz physical verification solutions to tape out some of the largest, most aggressive designs in the world," said Anirudh Devgan, general manager of Magma's Custom Design Business Unit.
"Many ICs are still being implemented in lower-cost 180-nm processes. Now that TSMC has made 180-nm rule decks available, more designers will be able to leverage the speed and accuracy of Quartz DRC and Quartz LVS."
"We have been working with Magma's Quartz DRC and Quartz LVS for advanced process nodes for several years, and have tested their accuracy using the same rigorous testing procedures we use for all DRC and LVS tools," said Tom Quan, deputy director of Design Service Marketing at TSMC. "In response to customer demand, we have now expanded support for Quartz DRC and Quartz LVS to include 180 nm."
Quartz DRC and Quartz LVS are architected to process integrated circuit (IC) designs of any size, at any technology node, in the least amount of time. Magma's is the first truly scalable physical verification solution, able to provide turnaround time that is up to an order of magnitude faster than existing solutions.
The Quartz tools are fully compatible with third-party IC implementation flows and can read file formats used by traditional physical verification tools.
"TSMC has been a key foundry partner with Magma, and our mutual customers have used Quartz physical verification solutions to tape out some of the largest, most aggressive designs in the world," said Anirudh Devgan, general manager of Magma's Custom Design Business Unit.
"Many ICs are still being implemented in lower-cost 180-nm processes. Now that TSMC has made 180-nm rule decks available, more designers will be able to leverage the speed and accuracy of Quartz DRC and Quartz LVS."
NI's enhanced sound and vibration software for noise frequency response analysis
AUSTIN, USA: National Instruments announced the release of the NI Sound and Vibration Measurement Suite 2009, a comprehensive collection of analysis and signal processing tools for noise, vibration and harshness (NVH), machine condition monitoring and audio test applications.
The Sound and Vibration Measurement Suite 2009 features a new continuous frequency sweep virtual instrument (VI) that greatly reduces the time it takes for engineers and scientists to perform frequency response tests.
The software suite also includes a new AES17-compliant audio filter VI for the National Instruments LabVIEW graphical development environment and the NI Sound and Vibration Assistant that provides the correct frequency filters for testing audio devices that take advantage of digital-to-analog conversion technology.
The continuous frequency sweep VI can perform frequency response and total harmonic distortion tests in one-tenth of the time traditional swept-sine approaches take. This function makes it possible for engineers and scientists to easily shift between the time and frequency domains, providing the ability to move beyond using fast Fourier transform (FFT) in signal analysis. Along with increasing the speed of test, the continuous frequency sweep makes it possible for new signals, such as a device under test residue signal, to be analyzed to characterize the response without stimulus signal interference.
In addition to the new AES17-compliant audio filter and continuous frequency sweep VIs, the LabVIEW VIs in the Sound and Vibration Measurement Suite contain octave analysis, frequency analysis and order tracking for automotive, military and aerospace and mechanical and structural designs. The measurement suite also includes the NI Sound and Vibration Assistant 2009, a stand-alone application for quickly acquiring, analyzing and logging acoustic, noise and vibration data.
The latest version of the Sound and Vibration Assistant features enhancements to the user interface to provide easy tachometer setup and support for using eddy current probes for displacement measurements. Engineers and scientists quickly and efficiently can get their applications started with the configuration-based Sound and Vibration Assistant or with the more than 50 ready-to-run LabVIEW example code bases included in the Sound and Vibration Measurement Suite 2009.
The Sound and Vibration Measurement Suite 2009 features a new continuous frequency sweep virtual instrument (VI) that greatly reduces the time it takes for engineers and scientists to perform frequency response tests.
The software suite also includes a new AES17-compliant audio filter VI for the National Instruments LabVIEW graphical development environment and the NI Sound and Vibration Assistant that provides the correct frequency filters for testing audio devices that take advantage of digital-to-analog conversion technology.
The continuous frequency sweep VI can perform frequency response and total harmonic distortion tests in one-tenth of the time traditional swept-sine approaches take. This function makes it possible for engineers and scientists to easily shift between the time and frequency domains, providing the ability to move beyond using fast Fourier transform (FFT) in signal analysis. Along with increasing the speed of test, the continuous frequency sweep makes it possible for new signals, such as a device under test residue signal, to be analyzed to characterize the response without stimulus signal interference.
In addition to the new AES17-compliant audio filter and continuous frequency sweep VIs, the LabVIEW VIs in the Sound and Vibration Measurement Suite contain octave analysis, frequency analysis and order tracking for automotive, military and aerospace and mechanical and structural designs. The measurement suite also includes the NI Sound and Vibration Assistant 2009, a stand-alone application for quickly acquiring, analyzing and logging acoustic, noise and vibration data.
The latest version of the Sound and Vibration Assistant features enhancements to the user interface to provide easy tachometer setup and support for using eddy current probes for displacement measurements. Engineers and scientists quickly and efficiently can get their applications started with the configuration-based Sound and Vibration Assistant or with the more than 50 ready-to-run LabVIEW example code bases included in the Sound and Vibration Measurement Suite 2009.
Monday, 28 September 2009
Vitesse adds to industry’s largest family of 11.5Gbps crosspoint switches
CAMARILLO, USA: Vitesse Semiconductor Corp. unveiled another innovation to its industry-leading signal integrity portfolio with the availability of the VSC3316, a new 16-port asynchronous crosspoint switch with enhanced FlexEQ signal equalization capabilities.
The VSC3316 is the highest speed crosspoint available with 16 lanes, each with the ability to operate independently from DC up to 11.5 Gbps. Housed in the industry’s smallest available 15mm x 15mm footprint for this size switch matrix, the VSC3316 enables new possibilities to expand line card and switch card bandwidth by 75 percent over existing solutions while overcoming legacy backplane signal integrity issues.
The device is ideal for transmitting multi-gigabit data signals over printed circuit boards, backplane connectors, and copper cabling used across a range of communications equipment including Core and Metro routers, blade servers, network storage equipment, broadcast video routers, and physical layer switches.
“Telecom, datacomm, networking, and Ethernet protocols are all converging at the 10 Gbps node, requiring high-performance signal integrity products to route, switch and clean up these signals at rates up to 11.5Gbps,” said Juan Garza, product marketing manager for Vitesse.
“With a long-standing history of delivering products with unique capabilities such as the VSC3316, Vitesse clearly understands this migration and is uniquely positioned to enable customers to create devices that the marketplace demands.”
Unique feature set
Capable of 11.5 Gbps per lane bandwidth, the VSC3316 includes detection/transmission of signal (LOS) providing native Out-of-Band (OOB) support of SAS/SATA storage protocols. This architecture also provides protocol transparent operation, thereby allowing each channel to run independently.
Supporting the latest high-speed protocols, Vitesse’s VSC3316 supports a wide frequency range encompassing virtually all data protocols including Gigabit Ethernet (GbE), XAUI, Reduced XAUI (RXAUI), 10GBASE-KR, SAS, SATA, 1G/2G/4G/8G/10G Fibre Channel, PCIe Gen 1/2/3 and InfiniBand.
The combined functions of crosspoint switching and Vitesse’s leading FlexEQ adaptive equalization technology make the VSC3316 a highly cost-effective, low-power signal integrity tool useful wherever there are high-speed signals.
The VSC3316 incorporates a broadband, fully non-blocking and multicasting switch core and flexible fourth-generation equalization and pre-emphasis I/O capability. Offering maximum architectural flexibility in switching and routing connections, the device can perform signal fan-out, loop-back and protection switching while also regenerating signals otherwise compromised by losses in the transmission medium.
Vitesse’s FlexEQ adaptive equalization capability works independently of the data rate, providing highly effective compensation for deterministic jitter across a wide range of operating conditions without requiring re-tuning.
World-class signal integrity
Vitesse was first to introduce integrated signal equalization in crosspoints switches and now has nearly a decade of successful product developments and dozens of products in production.
With the introduction of dual time constant equalization, Vitesse’s latest-generation FlexEQ technology enables a new level of signal integrity engineering. FlexEQ adaptive equalization technology allows the system designer to compensate for multiple impairments in the signal path, such as connectors and cabling or skin effect and dielectric losses in PCB traces.
FlexEQ also provides a significantly wider compensation range, so a single device can be used in multiple applications, from PCB traces to backplanes to copper cabling. Learn more about FlexEQ at www.vitesse.com/flexeq.
Pricing and availability
The VSC3316 operates on a single 2.5V supply with a typical per-channel power dissipation of 200mW and is available in a high-density 15mm x 15mm, 196-pin PBGA package. General samples are available now, with volume pricing available upon request.
The VSC3316 is the highest speed crosspoint available with 16 lanes, each with the ability to operate independently from DC up to 11.5 Gbps. Housed in the industry’s smallest available 15mm x 15mm footprint for this size switch matrix, the VSC3316 enables new possibilities to expand line card and switch card bandwidth by 75 percent over existing solutions while overcoming legacy backplane signal integrity issues.
The device is ideal for transmitting multi-gigabit data signals over printed circuit boards, backplane connectors, and copper cabling used across a range of communications equipment including Core and Metro routers, blade servers, network storage equipment, broadcast video routers, and physical layer switches.
“Telecom, datacomm, networking, and Ethernet protocols are all converging at the 10 Gbps node, requiring high-performance signal integrity products to route, switch and clean up these signals at rates up to 11.5Gbps,” said Juan Garza, product marketing manager for Vitesse.
“With a long-standing history of delivering products with unique capabilities such as the VSC3316, Vitesse clearly understands this migration and is uniquely positioned to enable customers to create devices that the marketplace demands.”
Unique feature set
Capable of 11.5 Gbps per lane bandwidth, the VSC3316 includes detection/transmission of signal (LOS) providing native Out-of-Band (OOB) support of SAS/SATA storage protocols. This architecture also provides protocol transparent operation, thereby allowing each channel to run independently.
Supporting the latest high-speed protocols, Vitesse’s VSC3316 supports a wide frequency range encompassing virtually all data protocols including Gigabit Ethernet (GbE), XAUI, Reduced XAUI (RXAUI), 10GBASE-KR, SAS, SATA, 1G/2G/4G/8G/10G Fibre Channel, PCIe Gen 1/2/3 and InfiniBand.
The combined functions of crosspoint switching and Vitesse’s leading FlexEQ adaptive equalization technology make the VSC3316 a highly cost-effective, low-power signal integrity tool useful wherever there are high-speed signals.
The VSC3316 incorporates a broadband, fully non-blocking and multicasting switch core and flexible fourth-generation equalization and pre-emphasis I/O capability. Offering maximum architectural flexibility in switching and routing connections, the device can perform signal fan-out, loop-back and protection switching while also regenerating signals otherwise compromised by losses in the transmission medium.
Vitesse’s FlexEQ adaptive equalization capability works independently of the data rate, providing highly effective compensation for deterministic jitter across a wide range of operating conditions without requiring re-tuning.
World-class signal integrity
Vitesse was first to introduce integrated signal equalization in crosspoints switches and now has nearly a decade of successful product developments and dozens of products in production.
With the introduction of dual time constant equalization, Vitesse’s latest-generation FlexEQ technology enables a new level of signal integrity engineering. FlexEQ adaptive equalization technology allows the system designer to compensate for multiple impairments in the signal path, such as connectors and cabling or skin effect and dielectric losses in PCB traces.
FlexEQ also provides a significantly wider compensation range, so a single device can be used in multiple applications, from PCB traces to backplanes to copper cabling. Learn more about FlexEQ at www.vitesse.com/flexeq.
Pricing and availability
The VSC3316 operates on a single 2.5V supply with a typical per-channel power dissipation of 200mW and is available in a high-density 15mm x 15mm, 196-pin PBGA package. General samples are available now, with volume pricing available upon request.
eASIC announces new ASIC-in-a-box design kits
SANTA CLARA, USA: eASIC Corp., a provider of NEW ASIC devices, announced the immediate availability of two ASIC-in-a-Box design kits that enable ASIC design to be widely accessible and thereby reverse the trend of declining ASIC design starts.
Through simplifying the design flow, the design kits empower engineers who are unfamiliar with ASIC design to now complete designs at a fraction of the cost and time compared to traditional standard cell ASICs.
Nextreme NEW ASICs are uniquely constructed to help simplify design, verification and silicon processing steps within the overall flow. Designers are able to focus their effort mainly on achieving their desired functionality and timing and not on arduous complex tasks such as power mesh design, signal integrity, test insertion, clock insertion, STA, ATPG, formal verification and LVS/DRC as they do with traditional standard cell ASICs.
The NEW ASIC-in-a-Box design kits provide software and documentation for completing and implementing Nextreme chip designs, and also deliver board design and debug guidelines for designing systems that incorporate Nextreme devices.
“Our NEW ASIC-in-a-Box design kits dispel the myth that ASICs are difficult, risky and expensive to design,” commented Jasbinder Bhoot, Vice President of Marketing at eASIC.
“eASIC has completed over 100 tape outs and delivered over 100 prototype designs in less than two years using the flow and tools that are now available in the ASIC-in-Box kits. Our new design kits make ASIC design affordable, accessible and achievable for everyone.”
Design kit contents
The NEW ASIC-in-a-Box Design Kits contain the following items:
* eASIC’s eTools software suite that includes easy to use utilities for configuring PLLs/clocks, assigning pins/pads, generating memories and post placement configuration and DRC.
* Magma DA’s Blast RTL software for performing synthesis and placement.
* Documentation and design tutorials to accelerate design implementation.
* JTAG programming cable for configuration and debug.
* Technical support website access.
Through simplifying the design flow, the design kits empower engineers who are unfamiliar with ASIC design to now complete designs at a fraction of the cost and time compared to traditional standard cell ASICs.
Nextreme NEW ASICs are uniquely constructed to help simplify design, verification and silicon processing steps within the overall flow. Designers are able to focus their effort mainly on achieving their desired functionality and timing and not on arduous complex tasks such as power mesh design, signal integrity, test insertion, clock insertion, STA, ATPG, formal verification and LVS/DRC as they do with traditional standard cell ASICs.
The NEW ASIC-in-a-Box design kits provide software and documentation for completing and implementing Nextreme chip designs, and also deliver board design and debug guidelines for designing systems that incorporate Nextreme devices.
“Our NEW ASIC-in-a-Box design kits dispel the myth that ASICs are difficult, risky and expensive to design,” commented Jasbinder Bhoot, Vice President of Marketing at eASIC.
“eASIC has completed over 100 tape outs and delivered over 100 prototype designs in less than two years using the flow and tools that are now available in the ASIC-in-Box kits. Our new design kits make ASIC design affordable, accessible and achievable for everyone.”
Design kit contents
The NEW ASIC-in-a-Box Design Kits contain the following items:
* eASIC’s eTools software suite that includes easy to use utilities for configuring PLLs/clocks, assigning pins/pads, generating memories and post placement configuration and DRC.
* Magma DA’s Blast RTL software for performing synthesis and placement.
* Documentation and design tutorials to accelerate design implementation.
* JTAG programming cable for configuration and debug.
* Technical support website access.
Broadcom licenses latest ARM Cortex A9 multiprocessor technology
CAMBRIDGE, UK & IRVINE, USA: ARM and Broadcom Corp. have signed a major licensing agreement for the ARM Cortex-A9 MPCore multicore processor.
Broadcom intends to target the technology towards next-generation mobile, wireless and other consumer electronics applications.
In addition to the Cortex-A9 processor, the agreement included ARM NEON SIMD (Single Instruction, Multiple Data) technology for the ARM Cortex-A series processors, designed to provide acceleration for advanced, feature-rich multimedia, gaming and compute intensive applications.
“This licensing agreement extends our ARM processor portfolio. The flexibility and scalability of the Cortex-A9 processor enables us to optimize development costs by addressing the requirements of wireless applications from a common core platform,” said Nambi Seshadri, VP and CTO, Mobile Platforms and Wireless Connectivity Division, Broadcom.
“This latest agreement with a recognized market leader in wireless system integration demonstrates the continued market momentum for the ARM Cortex-A9 processor and ARM multicore technology,” said Mike Inglis, EVP and general manager, Processor Division, ARM.
“By leveraging the performance and power efficiency benefits of the Cortex family of processors along with the other advanced ARM technology, Broadcom can offer feature-rich, future proof solutions for every segment of the wireless market.”
The ARM Cortex-A9 MPCore processor’s scalable performance enables developers to exceed the performance of today’s high-performance embedded devices while consuming significantly less power.
In addition, the Cortex-A9 processor features power management features including adaptive gating, dynamic voltage and frequency scaling and the ability for each core to go independently into standby, dormant or power-off energy management states, providing control over the dynamic as well as the static energy consumed by both the processor and memories.
The Cortex-A9 MPCore processor can contain up to four independently configured, but fully coherent cores carrying out multiple tasks on each one in parallel. However since any complexity is hidden in hardware, the processor can be programmed as easily as a single core processor by utilizing one of the many SMP-aware operating systems.
A single core Cortex-A9 processor is capable of delivering 2x the performance of today’s smartphone processors and the ARM MPCore technology scales that performance even further.
A four-CPU Cortex-A9 processor cluster is capable of delivering an unprecedented 10,000 aggregate DMIPS when clocked at 1GHz. To simplify and broaden the adoption of multicore solutions, the Cortex-A9 processor supports system-level coherence with accelerators and DMA to increase performance and reduce power consumption at the system level.
Broadcom intends to target the technology towards next-generation mobile, wireless and other consumer electronics applications.
In addition to the Cortex-A9 processor, the agreement included ARM NEON SIMD (Single Instruction, Multiple Data) technology for the ARM Cortex-A series processors, designed to provide acceleration for advanced, feature-rich multimedia, gaming and compute intensive applications.
“This licensing agreement extends our ARM processor portfolio. The flexibility and scalability of the Cortex-A9 processor enables us to optimize development costs by addressing the requirements of wireless applications from a common core platform,” said Nambi Seshadri, VP and CTO, Mobile Platforms and Wireless Connectivity Division, Broadcom.
“This latest agreement with a recognized market leader in wireless system integration demonstrates the continued market momentum for the ARM Cortex-A9 processor and ARM multicore technology,” said Mike Inglis, EVP and general manager, Processor Division, ARM.
“By leveraging the performance and power efficiency benefits of the Cortex family of processors along with the other advanced ARM technology, Broadcom can offer feature-rich, future proof solutions for every segment of the wireless market.”
The ARM Cortex-A9 MPCore processor’s scalable performance enables developers to exceed the performance of today’s high-performance embedded devices while consuming significantly less power.
In addition, the Cortex-A9 processor features power management features including adaptive gating, dynamic voltage and frequency scaling and the ability for each core to go independently into standby, dormant or power-off energy management states, providing control over the dynamic as well as the static energy consumed by both the processor and memories.
The Cortex-A9 MPCore processor can contain up to four independently configured, but fully coherent cores carrying out multiple tasks on each one in parallel. However since any complexity is hidden in hardware, the processor can be programmed as easily as a single core processor by utilizing one of the many SMP-aware operating systems.
A single core Cortex-A9 processor is capable of delivering 2x the performance of today’s smartphone processors and the ARM MPCore technology scales that performance even further.
A four-CPU Cortex-A9 processor cluster is capable of delivering an unprecedented 10,000 aggregate DMIPS when clocked at 1GHz. To simplify and broaden the adoption of multicore solutions, the Cortex-A9 processor supports system-level coherence with accelerators and DMA to increase performance and reduce power consumption at the system level.
Fuji Electric Device achieves significant cost reduction with Cadence Virtuoso accelerated parallel simulator
SAN JOSE, USA: Cadence Design Systems Inc. announced that Fuji Electric Device Technology Co. Ltd. cut development costs by about a third by using the Cadence Virtuoso Accelerated Parallel Simulator.
The company, a leader in power management ICs, credited the simulator with helping design teams boost the quality of their chips, and get them to market faster.
Fuji Electric Device Technology develops high-voltage and high-efficiency AC/DC IC for green IDC power management, communication and automotive markets. To verify a full-chip power system, a simulation technology with high performance and full SPICE accuracy was required.
“The Virtuoso Accelerated Parallel Simulator enabled our design teams to reduce the number of prototyping iterations, leading to a 30 percent reduction in our development costs,” said Takashi Kobayashi, general manager, Semiconductor Device R&D Dept., Electron Device Laboratory, Semiconductors Group, Fuji Electric Device Technology Co. Ltd.
“Using the Accelerated Parallel Simulator, we have reduced simulation time up to 75 percent for our full-chip designs without sacrificing any accuracy. As a result we are able to deliver high-quality devices and meet the market window.”
“We’re glad to see Fuji Electric Device Technology place its logo alongside the many other leading technology companies who have discovered the capabilities and benefits of the Virtuoso Accelerated Parallel Simulator for small to large pre layout and post layout designs,” said Zhihong Lui, corporate vice president at Cadence.
“The company’s experience of quality improvements and faster time to market is wholly consistent with what we’ve been hearing from other companies as well.”
Part of the Virtuoso Multi-mode Simulation, the Virtuoso Accelerated Parallel Simulator provides the next generation SPICE accurate simulation, with scalable performance and capacity, for a broad class of complex analog, RF and mixed-signal blocks and sub-systems with ten thousands of devices.
It is tightly integrated with the Virtuoso custom design platform and provides all the transistor-level analysis capabilities as in Virtuoso Spectre Simulator. The proprietary full matrix-solving algorithm delivers unparalleled scalable multi-threading capability using modern multi-core machines.
The company, a leader in power management ICs, credited the simulator with helping design teams boost the quality of their chips, and get them to market faster.
Fuji Electric Device Technology develops high-voltage and high-efficiency AC/DC IC for green IDC power management, communication and automotive markets. To verify a full-chip power system, a simulation technology with high performance and full SPICE accuracy was required.
“The Virtuoso Accelerated Parallel Simulator enabled our design teams to reduce the number of prototyping iterations, leading to a 30 percent reduction in our development costs,” said Takashi Kobayashi, general manager, Semiconductor Device R&D Dept., Electron Device Laboratory, Semiconductors Group, Fuji Electric Device Technology Co. Ltd.
“Using the Accelerated Parallel Simulator, we have reduced simulation time up to 75 percent for our full-chip designs without sacrificing any accuracy. As a result we are able to deliver high-quality devices and meet the market window.”
“We’re glad to see Fuji Electric Device Technology place its logo alongside the many other leading technology companies who have discovered the capabilities and benefits of the Virtuoso Accelerated Parallel Simulator for small to large pre layout and post layout designs,” said Zhihong Lui, corporate vice president at Cadence.
“The company’s experience of quality improvements and faster time to market is wholly consistent with what we’ve been hearing from other companies as well.”
Part of the Virtuoso Multi-mode Simulation, the Virtuoso Accelerated Parallel Simulator provides the next generation SPICE accurate simulation, with scalable performance and capacity, for a broad class of complex analog, RF and mixed-signal blocks and sub-systems with ten thousands of devices.
It is tightly integrated with the Virtuoso custom design platform and provides all the transistor-level analysis capabilities as in Virtuoso Spectre Simulator. The proprietary full matrix-solving algorithm delivers unparalleled scalable multi-threading capability using modern multi-core machines.
Applied Materials awarded key service contract by Fujitsu Microelectronics
SANTA CLARA, USA: Applied Materials, Inc. today announced that it has been awarded an integrated service contract by Fujitsu Microelectronics Ltd. to support its advanced 300mm semiconductor factory in Mie, Japan.
Under the program, Applied will service over 100 Applied chipmaking systems utilizing its innovative Applied Performance Service solution that scales service levels to match factory loading.
In addition, Applied will implement its Applied E3 advanced equipment and process control technology on Fujitsu Microelectronics Mie plant’s entire toolset to increase the efficiency, predictability and profitability of Fujitsu Microelectronics’ system-on-chip (SoC) manufacturing process.
“The SoC market requires a high degree of application-specific customization, resulting in a constantly changing product mix. Maintaining tight process control on every wafer is critical to profitability,” said Kiyoshi Watanabe, corporate vice president, Fujitsu Microelectronics Ltd.
“The Applied Performance Service Program paces service and price to actual utilization rates to provide us with committed uptime performance at a low, predictable cost that tracks factory loading.”
The uniquely flexible Applied Performance Service program can reduce maintenance costs by an average of 15 percent, making it a particularly powerful strategy for chipmakers producing SoC and other cost-sensitive logic devices, especially in times of rapidly changing demand.
Using proprietary fingerprinting algorithms, the Applied E3 solution further raises cost-efficiency by optimizing and tracking the process performance of every tool in the fab.
The E3 system’s fault detection and classification (FDC) technology provides rapid feedback on tool, wafer and lot performance to avoid unexpected excursions that impact productivity and cycle time, while run-to-run control (R2R) adjusts processing parameters in real time to enable more consistent output and higher device yields.
“Applied’s high-tech service approach is a perfect match for a sophisticated and agile fab such as Fujitsu Microelectronics’ Mie plant,” said Charlie Pappis, vice president and general manager of Applied Global Services. “By combining variable service with equipment and process automation, customers can reduce costs and take advantage of the unused potential of their existing assets. The growing momentum of our service business in Asia is a testament to Applied’s unique ability to provide innovative support solutions.”
Under the program, Applied will service over 100 Applied chipmaking systems utilizing its innovative Applied Performance Service solution that scales service levels to match factory loading.
In addition, Applied will implement its Applied E3 advanced equipment and process control technology on Fujitsu Microelectronics Mie plant’s entire toolset to increase the efficiency, predictability and profitability of Fujitsu Microelectronics’ system-on-chip (SoC) manufacturing process.
“The SoC market requires a high degree of application-specific customization, resulting in a constantly changing product mix. Maintaining tight process control on every wafer is critical to profitability,” said Kiyoshi Watanabe, corporate vice president, Fujitsu Microelectronics Ltd.
“The Applied Performance Service Program paces service and price to actual utilization rates to provide us with committed uptime performance at a low, predictable cost that tracks factory loading.”
The uniquely flexible Applied Performance Service program can reduce maintenance costs by an average of 15 percent, making it a particularly powerful strategy for chipmakers producing SoC and other cost-sensitive logic devices, especially in times of rapidly changing demand.
Using proprietary fingerprinting algorithms, the Applied E3 solution further raises cost-efficiency by optimizing and tracking the process performance of every tool in the fab.
The E3 system’s fault detection and classification (FDC) technology provides rapid feedback on tool, wafer and lot performance to avoid unexpected excursions that impact productivity and cycle time, while run-to-run control (R2R) adjusts processing parameters in real time to enable more consistent output and higher device yields.
“Applied’s high-tech service approach is a perfect match for a sophisticated and agile fab such as Fujitsu Microelectronics’ Mie plant,” said Charlie Pappis, vice president and general manager of Applied Global Services. “By combining variable service with equipment and process automation, customers can reduce costs and take advantage of the unused potential of their existing assets. The growing momentum of our service business in Asia is a testament to Applied’s unique ability to provide innovative support solutions.”
Applied Materials begins shipments of world's largest, fastest, roll-to-roll vacuum coating systems
ALZENAU, GERMANY: Applied Materials Inc. has begun shipping multiple Applied Topmet 4450 systems, the world's largest and fastest, roll-to-roll thin film metal deposition machine, to a customer in Europe.
This latest model of Applied’s Topmet 4450 product line deposits ultra-thin aluminum films on 4.5m (15 feet) wide rolls of substrate material at a remarkable 20 meters per second (45 miles per hour) to provide a barrier against oxygen, moisture and ultra-violet radiation for flexible packaging applications.
New technology advances in the system produce state-of-the-art film quality while doubling the coated area output to drive down coated film production cost by more than 20 percent.
“We are excited about the growth potential of the roll-to-roll equipment business for flexible packaging as well as emerging applications such as flexible electronics, displays and solar,” said James Robson, vice president and general manager of Applied’s Glass and Web Product Group.
“The expanded Topmet 4450 system builds on 50 years of leadership in roll-to-roll machine design, with almost 600 systems installed worldwide, and also reflects Applied Materials’ extensive expertise in scaling up complex manufacturing equipment and processes.”
The new Topmet 4450 system is considerably faster than competing systems. It not only provides direct cost savings, but also enables higher material yield, simplified downstream processing, reduced labor requirements and a smaller factory footprint.
The system’s efficient use of power and raw materials, enabled by advanced high rate evaporation sources, closed-loop automatic layer control and high performance pumping systems, results in lower operating costs. In addition, an award winning real-time layer thickness monitoring system enables consistent coating uniformity while the novel uniform-tension roller design provides high speed, wrinkle-free material handling.
“We are proud to support our customers’ drive to lower production costs through our continuous system innovation,” said John Busch, head of Applied’s Web Coating Group.
“With this system, we boosted output, lowered operating expense and maintained quality – making the industry-leading thin film metallization systems even better. Applied will continue to earn its leadership position in vacuum coating production solutions with innovative products and superior customer support.”
This latest model of Applied’s Topmet 4450 product line deposits ultra-thin aluminum films on 4.5m (15 feet) wide rolls of substrate material at a remarkable 20 meters per second (45 miles per hour) to provide a barrier against oxygen, moisture and ultra-violet radiation for flexible packaging applications.
New technology advances in the system produce state-of-the-art film quality while doubling the coated area output to drive down coated film production cost by more than 20 percent.
“We are excited about the growth potential of the roll-to-roll equipment business for flexible packaging as well as emerging applications such as flexible electronics, displays and solar,” said James Robson, vice president and general manager of Applied’s Glass and Web Product Group.
“The expanded Topmet 4450 system builds on 50 years of leadership in roll-to-roll machine design, with almost 600 systems installed worldwide, and also reflects Applied Materials’ extensive expertise in scaling up complex manufacturing equipment and processes.”
The new Topmet 4450 system is considerably faster than competing systems. It not only provides direct cost savings, but also enables higher material yield, simplified downstream processing, reduced labor requirements and a smaller factory footprint.
The system’s efficient use of power and raw materials, enabled by advanced high rate evaporation sources, closed-loop automatic layer control and high performance pumping systems, results in lower operating costs. In addition, an award winning real-time layer thickness monitoring system enables consistent coating uniformity while the novel uniform-tension roller design provides high speed, wrinkle-free material handling.
“We are proud to support our customers’ drive to lower production costs through our continuous system innovation,” said John Busch, head of Applied’s Web Coating Group.
“With this system, we boosted output, lowered operating expense and maintained quality – making the industry-leading thin film metallization systems even better. Applied will continue to earn its leadership position in vacuum coating production solutions with innovative products and superior customer support.”
ST intros MotionBee platform for remote motion control
SINGAPORE: STMicroelectronics, a leader in MEMS and wireless technologies, has introduced MotionBee, a complete, ready-for-use platform that combines state-of-the-art motion sensing with ZigBee wireless technology in a single ultra-compact module.
Boasting low power consumption and high level of integration, ST’s MotionBee enables system developers to quickly and cost-effectively build wireless sensor networks for remote motion recognition and tracking in many different application areas, including healthcare, security, industrial control and environmental monitoring.
The first-generation MotionBee module integrates ST’s market-proven 3-axis digital-output MEMS accelerometer with a ZigBee platform from Ember Corporation that includes the EM250 System-on-Chip, a 2.4GHz, IEEE 802.15.4-compliant radio transceiver and processor, together with the EmberZNet PRO ZigBee networking software.
The module detects accelerations in the selectable range of +/-2g and +/- 6g and transmits the information to a central connection point (star topology) or every other node (mesh topology) in a ZigBee wireless network. The module is fully programmable and its small size (49 x 27 x 5 mm) makes the deployment easier, such as in wearable medical or sports equipment.
Addressing specifically the requirements of remote sensing and control systems, ZigBee technology enables the implementation of broad-based wireless mesh networks that are able to run for months on inexpensive primary batteries, representing a viable alternative to costly hard-wired systems.
The first-generation MotionBee modules are optimized for designs that require long battery life, a low external component count, and a reliable, proven, industry-standard networking solution.
ST’s complete and cost-effective remote motion control platform enables wireless sensor networks in a variety of existing and emerging applications, such as vibration monitoring and detection in different indoor and outdoor environments, automated navigation systems, or bio-sensor networks in remote-healthcare scenarios.
ST’s first MotionBee device, the SPMB250-A1, is available now, with samples priced at $60. An evaluation kit is also available, with two pre-programmed modules and a ZigBee dongle for integration with a PC.
Boasting low power consumption and high level of integration, ST’s MotionBee enables system developers to quickly and cost-effectively build wireless sensor networks for remote motion recognition and tracking in many different application areas, including healthcare, security, industrial control and environmental monitoring. The first-generation MotionBee module integrates ST’s market-proven 3-axis digital-output MEMS accelerometer with a ZigBee platform from Ember Corporation that includes the EM250 System-on-Chip, a 2.4GHz, IEEE 802.15.4-compliant radio transceiver and processor, together with the EmberZNet PRO ZigBee networking software.
The module detects accelerations in the selectable range of +/-2g and +/- 6g and transmits the information to a central connection point (star topology) or every other node (mesh topology) in a ZigBee wireless network. The module is fully programmable and its small size (49 x 27 x 5 mm) makes the deployment easier, such as in wearable medical or sports equipment.
Addressing specifically the requirements of remote sensing and control systems, ZigBee technology enables the implementation of broad-based wireless mesh networks that are able to run for months on inexpensive primary batteries, representing a viable alternative to costly hard-wired systems.
The first-generation MotionBee modules are optimized for designs that require long battery life, a low external component count, and a reliable, proven, industry-standard networking solution.
ST’s complete and cost-effective remote motion control platform enables wireless sensor networks in a variety of existing and emerging applications, such as vibration monitoring and detection in different indoor and outdoor environments, automated navigation systems, or bio-sensor networks in remote-healthcare scenarios.
ST’s first MotionBee device, the SPMB250-A1, is available now, with samples priced at $60. An evaluation kit is also available, with two pre-programmed modules and a ZigBee dongle for integration with a PC.
New report spotlights technology opportunities in India
UK: A new UK Trade & Investment (UKTI) report, ‘Business Opportunities in India for Technology Partnerships', maps the deep mine of business for Britain's technology sector in India generated by its increasingly sophisticated and growing middle class.
Launched to coincide with two Indian delegations visiting the UK, the report is aimed at British firms working with semiconductors, mobile communications and healthcare. It provides valuable information about the opportunities to combine the UK's frontier expertise with India's huge ICT industry to provide technological solutions for India and the world.
Minister for Trade, Investment and Business Lord Davies recently visited India, which increased investment into the UK by 44% in 2008, becoming the second largest source of investment after the US. Two-thirds of the Indians firms investing in the UK are in the software and technology fields.
Lord Davies said: "It's been over a decade since outsourcing was the buzzword. Now, innovative Indian and UK firms are working together at the top end of the industrial spectrum. India's talent, confidence, energy and entrepreneurial spirit must be seen to be believed."
‘Business Opportunities in India for Technology Partnerships' is part of UKTI's ICT strategy to help SMEs tap into partnership programmes and business opportunities through missions, networking and face-to-face meetings. Combining UK technology expertise with the scale of India's ICT industry should lead to powerful solutions for India and globally.
The first delegation to the UK is the Indian Semiconductor Association, from 29 September to 2 October, following a recent MoU signing in New Delhi to work with UKTI on developing India-UK technology partnerships. A major part of the programme will be UK-India seminars and networking events organised with Silicon South West, South West Regional Development Agency and East of England International.
NASSCOM is the second delegation, bringing 14 of its members covering a variety of areas, including e-learning and healthcare. Events organised in London with Intellect and Think London will help UK companies explore how to work with Indian firms and meet one-to-one with the NASSCOM delegates.
UKTI Chief Executive Sir Andrew Cahn said: "Despite the global difficulties India remains a vital growth economy with opportunities to match. With potential partnerships across technology sub-sectors, coupled with a severe skills shortage, now is the time for UK companies to take advantage of the technology boom."
To help British business enter the Indian market, UKTI's presence is stronger than ever with 90 staff on the ground in India alone. UKTI can help UK businesses looking to explore options in India, find business partners and provide grants to help firms attend tradeshows.
UK-India bilateral trade is worth £12.6 billion with double-digit growth in the last year. The UK's exports to India rose in 2008 to £5.9 billion while imports in 2008 to £6.2 billion.
To request a copy ‘Business Opportunities in India for Technology Partnerships' email ict@ukti.gsi.gov.uk
Launched to coincide with two Indian delegations visiting the UK, the report is aimed at British firms working with semiconductors, mobile communications and healthcare. It provides valuable information about the opportunities to combine the UK's frontier expertise with India's huge ICT industry to provide technological solutions for India and the world.
Minister for Trade, Investment and Business Lord Davies recently visited India, which increased investment into the UK by 44% in 2008, becoming the second largest source of investment after the US. Two-thirds of the Indians firms investing in the UK are in the software and technology fields.
Lord Davies said: "It's been over a decade since outsourcing was the buzzword. Now, innovative Indian and UK firms are working together at the top end of the industrial spectrum. India's talent, confidence, energy and entrepreneurial spirit must be seen to be believed."
‘Business Opportunities in India for Technology Partnerships' is part of UKTI's ICT strategy to help SMEs tap into partnership programmes and business opportunities through missions, networking and face-to-face meetings. Combining UK technology expertise with the scale of India's ICT industry should lead to powerful solutions for India and globally.
The first delegation to the UK is the Indian Semiconductor Association, from 29 September to 2 October, following a recent MoU signing in New Delhi to work with UKTI on developing India-UK technology partnerships. A major part of the programme will be UK-India seminars and networking events organised with Silicon South West, South West Regional Development Agency and East of England International.
NASSCOM is the second delegation, bringing 14 of its members covering a variety of areas, including e-learning and healthcare. Events organised in London with Intellect and Think London will help UK companies explore how to work with Indian firms and meet one-to-one with the NASSCOM delegates.
UKTI Chief Executive Sir Andrew Cahn said: "Despite the global difficulties India remains a vital growth economy with opportunities to match. With potential partnerships across technology sub-sectors, coupled with a severe skills shortage, now is the time for UK companies to take advantage of the technology boom."
To help British business enter the Indian market, UKTI's presence is stronger than ever with 90 staff on the ground in India alone. UKTI can help UK businesses looking to explore options in India, find business partners and provide grants to help firms attend tradeshows.
UK-India bilateral trade is worth £12.6 billion with double-digit growth in the last year. The UK's exports to India rose in 2008 to £5.9 billion while imports in 2008 to £6.2 billion.
To request a copy ‘Business Opportunities in India for Technology Partnerships' email ict@ukti.gsi.gov.uk
Friday, 25 September 2009
STMicroelectronics' combined audio converter/driver IC
SINGAPORE: Audiophiles and aficionados of portables entertainment devices such as MP3 players, cellular phones, personal computers, laptop computers and/or PDAs are extremely demanding about the sound quality of their entertainment experience.
Meanwhile, engineers behind the scenes continue to struggle with delivering increasing quality with new features in more stylish packaging at lower cost.
Combined audio converter/driver ICs are simplifying the design of set-top boxes and other consumer audio/video products, but the new TS4657 from STMicroelectronics, a leading provider of digital audio ICs, improves on existing technology by reducing external components and power consumption and improving sound quality.
ST’s new TS4657 is a single chip combining audio-DAC (digital-to-analog converter) and line-driver functions to feed the audio Line-Out connection of set-top boxes, DVD players, portable multimedia devices, sound cards, or similar equipment. The Line Out provides a direct connection to drive an external home amplifier, allowing for a better audio experience by maintaining constant signal levels, better digital volume control and a wider volume range.
The IC uses an internal power management unit to produce a 2.2Vrms audio-output signal for voltages from 3.0V to 5.5V, eliminating the need for a separate high-voltage power supply to drive the Line-Out output. Similar devices typically require four external capacitors for the charge pumps but ST’s high-frequency design integrates this function on-chip, thereby saving board space and bill-of-materials costs.
The TS4657 is in production now, available in the 4 x 4mm QFN20 package and priced at $0.91 in quantities of 1,000 units.
Meanwhile, engineers behind the scenes continue to struggle with delivering increasing quality with new features in more stylish packaging at lower cost.
Combined audio converter/driver ICs are simplifying the design of set-top boxes and other consumer audio/video products, but the new TS4657 from STMicroelectronics, a leading provider of digital audio ICs, improves on existing technology by reducing external components and power consumption and improving sound quality.ST’s new TS4657 is a single chip combining audio-DAC (digital-to-analog converter) and line-driver functions to feed the audio Line-Out connection of set-top boxes, DVD players, portable multimedia devices, sound cards, or similar equipment. The Line Out provides a direct connection to drive an external home amplifier, allowing for a better audio experience by maintaining constant signal levels, better digital volume control and a wider volume range.
The IC uses an internal power management unit to produce a 2.2Vrms audio-output signal for voltages from 3.0V to 5.5V, eliminating the need for a separate high-voltage power supply to drive the Line-Out output. Similar devices typically require four external capacitors for the charge pumps but ST’s high-frequency design integrates this function on-chip, thereby saving board space and bill-of-materials costs.
The TS4657 is in production now, available in the 4 x 4mm QFN20 package and priced at $0.91 in quantities of 1,000 units.
Applied Micro-TSMC bring Power Architecture MPUs to TSMC technology platforms
SUNNYVALE, USA: Applied Micro Circuits Corp., a global leader in energy conscious computing and communications solutions, and Taiwan Semiconductor Manufacturing Co. announced a collaboration enabling AppliedMicro’'s Power Architecture microprocessors to be manufactured on TSMC’s industry-leading technology platform first at 90nm then moving to 65nm and 40nm soon after.
The agreement signals the first time that Applied Micro'’s embedded microprocessors are available beyond complex and costly Silicon-on-Insulator (SOI) fabrication processes. The first product of this collaboration, the Applied Micro APM 83290 processor, operates at 1.5GHz which represents the highest performance for a Power Architecture processor manufactured on bulk CMOS technology, thus highlighting the benefits of successful technology partnership with TSMC.
“The collaboration with TSMC marks an entirely new milestone for Power Architecture processing as it enables us to reach many low-cost application areas that were impractical for processors built in SOI technology,” said Robert Fanfelle, Associate Vice President of Strategic Marketing for Applied Micro. “TSMC’'s 90nm CMOS technology is stable and mature and it offers an unbeatable combination of performance and price flexibility for a new generation of embedded computing applications.”
“TSMC values the collaboration with Applied Micro because by pooling our strengths it signals a new wave of innovation for both companies,” said Pan-Wei Lai, Vice President of Business Development at TSMC North America. “Power Architecture technology is highly versatile and adaptable for a wide variety of embedded applications and AppliedMicro’'s plans for new processor designs promise to extend the relationship between our two companies as we explore ways to bring about improvements on TSMC’s advanced technology platforms.”
Applied Micro Power Architecture processor families have forged market leadership positions in wireless access points, cellular base stations and multifunction printers. Moreover, the company’s expertise in communications technology and advanced peripheral development around Power Architecture cores continues to capture market share from major networking, storage and consumer OEMs.
Prospective system designers can leverage an extensive ecosystem of industry-leading partners encompassing operating systems, development tools, software platforms, board-level products, and design services allowing rapid time to market product release.
“Our company’'s collaboration with TSMC heralds a new era in Power Architecture computing as it becomes more accessible for systems designers that want an excellent balance of high performance and low power consumption for today’s energy-conscious system designs,” Applied Micro'’s Fanfelle said.
“Our processor and system-on-a-chip expertise combined with TSMC’s experience and technology provide a powerful launching point for Power Architecture based solutions as we enable new classes of products and systems.”
The announcement kicks off a long-term strategic relationship between Applied Micro and TSMC designed to widen the availability of Power Architecture embedded processing across TSMC’s competitive bulk technology platform. The move extends Applied Micro’'s energy efficient product emphasis leadership by leveraging the benefits of TSMC’s high-performance, low-power processes.
The agreement signals the first time that Applied Micro'’s embedded microprocessors are available beyond complex and costly Silicon-on-Insulator (SOI) fabrication processes. The first product of this collaboration, the Applied Micro APM 83290 processor, operates at 1.5GHz which represents the highest performance for a Power Architecture processor manufactured on bulk CMOS technology, thus highlighting the benefits of successful technology partnership with TSMC.
“The collaboration with TSMC marks an entirely new milestone for Power Architecture processing as it enables us to reach many low-cost application areas that were impractical for processors built in SOI technology,” said Robert Fanfelle, Associate Vice President of Strategic Marketing for Applied Micro. “TSMC’'s 90nm CMOS technology is stable and mature and it offers an unbeatable combination of performance and price flexibility for a new generation of embedded computing applications.”
“TSMC values the collaboration with Applied Micro because by pooling our strengths it signals a new wave of innovation for both companies,” said Pan-Wei Lai, Vice President of Business Development at TSMC North America. “Power Architecture technology is highly versatile and adaptable for a wide variety of embedded applications and AppliedMicro’'s plans for new processor designs promise to extend the relationship between our two companies as we explore ways to bring about improvements on TSMC’s advanced technology platforms.”
Applied Micro Power Architecture processor families have forged market leadership positions in wireless access points, cellular base stations and multifunction printers. Moreover, the company’s expertise in communications technology and advanced peripheral development around Power Architecture cores continues to capture market share from major networking, storage and consumer OEMs.
Prospective system designers can leverage an extensive ecosystem of industry-leading partners encompassing operating systems, development tools, software platforms, board-level products, and design services allowing rapid time to market product release.
“Our company’'s collaboration with TSMC heralds a new era in Power Architecture computing as it becomes more accessible for systems designers that want an excellent balance of high performance and low power consumption for today’s energy-conscious system designs,” Applied Micro'’s Fanfelle said.
“Our processor and system-on-a-chip expertise combined with TSMC’s experience and technology provide a powerful launching point for Power Architecture based solutions as we enable new classes of products and systems.”
The announcement kicks off a long-term strategic relationship between Applied Micro and TSMC designed to widen the availability of Power Architecture embedded processing across TSMC’s competitive bulk technology platform. The move extends Applied Micro’'s energy efficient product emphasis leadership by leveraging the benefits of TSMC’s high-performance, low-power processes.
LSI named to Carbon Disclosure Leadership Index
BANGALORE, INDIA: LSI Corp. announced that the Carbon Disclosure Project (CDP), which represents 475 institutional investors with $55 trillion in assets, has named LSI to the 2009 Carbon Disclosure Leadership Index.
“LSI is committed to reducing our carbon footprint in the United States and at our facilities around the world,” said Andy Micallef, executive vice president, Worldwide Operations, LSI. “Recognition by the Carbon Disclosure Project is a welcome reflection of our results to date.”
Compiled by PricewaterhouseCoopers, the Carbon Disclosure Leadership Index is an evaluation tool for institutional investors. It lists the top 50 corporations on the S&P 500 based on analysis of management responses to the CDP’s annual questionnaire.
In 2009, the questionnaire focused on greenhouse gas emissions, emissions reduction targets, and the risks and opportunities associated with climate change.
Paul Dickinson, Chief Executive of the Carbon Disclosure Project, said, “The Carbon Disclosure Leadership Index recognizes companies who have demonstrated a good understanding of how climate change affects their business today and in the future.
Companies who minimize their emissions today and who seize opportunities to reduce their footprint tomorrow will be well-placed to prosper in a low carbon economy of the future.”
“LSI is committed to reducing our carbon footprint in the United States and at our facilities around the world,” said Andy Micallef, executive vice president, Worldwide Operations, LSI. “Recognition by the Carbon Disclosure Project is a welcome reflection of our results to date.”
Compiled by PricewaterhouseCoopers, the Carbon Disclosure Leadership Index is an evaluation tool for institutional investors. It lists the top 50 corporations on the S&P 500 based on analysis of management responses to the CDP’s annual questionnaire.
In 2009, the questionnaire focused on greenhouse gas emissions, emissions reduction targets, and the risks and opportunities associated with climate change.
Paul Dickinson, Chief Executive of the Carbon Disclosure Project, said, “The Carbon Disclosure Leadership Index recognizes companies who have demonstrated a good understanding of how climate change affects their business today and in the future.
Companies who minimize their emissions today and who seize opportunities to reduce their footprint tomorrow will be well-placed to prosper in a low carbon economy of the future.”
Wafer Level Packaging 2009 Report
LYON, FRANCE: Yole Développement updated its new markets & technological study dedicated to Wafer Level Packaging: Wafer Level Packaging 2009 report.
In this WLP‐2009 report, Yole presents detailed technical and market status and forecasts on WLP technologies and applications. Market figures and growth rates are provided in units and wafers for each market segment over the 2008‐2013 period. Numerous application examples are given, recent technical developments and options are detailed, and industry‐wide technology roadmaps are presented.
Source: Yole Développement, France
Wafer Level Packaging is a confirmed high growth trend in the semiconductor packaging industry. Wafer Level Chip Scale Packaging (WLCSP), or the direct bonding of bumped ICs on PCBs as one of the most visible expressions of WLP, is undoubtedly the fastest growing package type in the whole industry.
Yole forecasts that it will exceed 10 billion units per year by 2012, at a compound annual growth rate of more than 20 percent over the next five years. Primarily driven by footprint and thickness reduction of packaged integrated circuits in mobile phones, WLCSP is now used in a wide range of circuits for handsets: EMI/ESD interface protection; power supply (PMIC/PMU, DC/DC converters, LED drivers, MOSFET’s,); connectivity (Bluetooth, WLAN); and other features (FM, GPS, TV on mobile, camera).
Wafer‐Level Packaging of MEMS devices is also expected to grow fast, driven here too by the handset market and its fast increasing rate of integrated sensors (MEMS microphones, accelerometers, gyroscopes, pressure and magnetic sensors).
Maturing WLP technologies sustain high market growth
Early reliability issues have been largely improved with time, using new design rules and materials wafer level packaged parts now comfortably pass thermal cycling and drop qualification stress tests for consumer applications with extended die sizes up to 20mm². Concurrently the market matured as more WLP assembly service providers entered the market. More customers gained confidence in these technologies and tier 2 handset manufacturers also recently started to buy and mount WLCSP solutions on their boards.
Besides offering unequaled geometry benefits of small footprint and ”thinness”, WLCSP has become cost competitive with QFN -- its main package platform competitor in handsets. This cost benefit now paves the way for the adoption of WLCSP by more consumer end user applications like netbooks, notebooks, gaming consoles, MP3 players and digital still cameras. Some WLCSP devices can also be found in automotive applications, which may well represent a future growth sector for WLP.
A likely capacity shortage of 300mm WLCSP in the coming months
It appears that during the recent economic downturn, the semiconductor packaging industry as a whole failed to anticipate this demand and did not plan sufficient WLCSP production capacity for the coming months. In particular, a shortage of 300mm wafer capacity for WLCSP is very likely to occur during the next quarters.
However, significant investments are being made by a few industry leaders to develop future WLP technologies, like fan‐out WLCSP or chip embedding, which will extend the reach of WLP to larger ICs and enable the combination of small size chip‐scale packaging with low profile 3D System‐in‐Package.
In this WLP‐2009 report, you will find detailed technical and market status and forecasts on WLP technologies and applications. Market figures and growth rates are provided in units and wafers for each market segment over the 2008‐2013 period. Numerous application examples are given, recent technical developments and options are detailed, and industry‐wide technology roadmaps are presented.
In this WLP‐2009 report, Yole presents detailed technical and market status and forecasts on WLP technologies and applications. Market figures and growth rates are provided in units and wafers for each market segment over the 2008‐2013 period. Numerous application examples are given, recent technical developments and options are detailed, and industry‐wide technology roadmaps are presented.
Source: Yole Développement, FranceWafer Level Packaging is a confirmed high growth trend in the semiconductor packaging industry. Wafer Level Chip Scale Packaging (WLCSP), or the direct bonding of bumped ICs on PCBs as one of the most visible expressions of WLP, is undoubtedly the fastest growing package type in the whole industry.
Yole forecasts that it will exceed 10 billion units per year by 2012, at a compound annual growth rate of more than 20 percent over the next five years. Primarily driven by footprint and thickness reduction of packaged integrated circuits in mobile phones, WLCSP is now used in a wide range of circuits for handsets: EMI/ESD interface protection; power supply (PMIC/PMU, DC/DC converters, LED drivers, MOSFET’s,); connectivity (Bluetooth, WLAN); and other features (FM, GPS, TV on mobile, camera).
Wafer‐Level Packaging of MEMS devices is also expected to grow fast, driven here too by the handset market and its fast increasing rate of integrated sensors (MEMS microphones, accelerometers, gyroscopes, pressure and magnetic sensors).
Maturing WLP technologies sustain high market growth
Early reliability issues have been largely improved with time, using new design rules and materials wafer level packaged parts now comfortably pass thermal cycling and drop qualification stress tests for consumer applications with extended die sizes up to 20mm². Concurrently the market matured as more WLP assembly service providers entered the market. More customers gained confidence in these technologies and tier 2 handset manufacturers also recently started to buy and mount WLCSP solutions on their boards.
Besides offering unequaled geometry benefits of small footprint and ”thinness”, WLCSP has become cost competitive with QFN -- its main package platform competitor in handsets. This cost benefit now paves the way for the adoption of WLCSP by more consumer end user applications like netbooks, notebooks, gaming consoles, MP3 players and digital still cameras. Some WLCSP devices can also be found in automotive applications, which may well represent a future growth sector for WLP.
A likely capacity shortage of 300mm WLCSP in the coming months
It appears that during the recent economic downturn, the semiconductor packaging industry as a whole failed to anticipate this demand and did not plan sufficient WLCSP production capacity for the coming months. In particular, a shortage of 300mm wafer capacity for WLCSP is very likely to occur during the next quarters.
However, significant investments are being made by a few industry leaders to develop future WLP technologies, like fan‐out WLCSP or chip embedding, which will extend the reach of WLP to larger ICs and enable the combination of small size chip‐scale packaging with low profile 3D System‐in‐Package.
In this WLP‐2009 report, you will find detailed technical and market status and forecasts on WLP technologies and applications. Market figures and growth rates are provided in units and wafers for each market segment over the 2008‐2013 period. Numerous application examples are given, recent technical developments and options are detailed, and industry‐wide technology roadmaps are presented.
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