SAN JOSE, USA: Magma Design Automation Inc. announced that Quartz DRC and Quartz LVS rule decks are available for TSMC 180-nanometer (nm) process technologies. With this addition, designers can now download 40-nm, 65-nm, 90-nm, 130-nm and 180-nm rule decks for Quartz DRC and Quartz LVS from the TSMC-Online website.
"We have been working with Magma's Quartz DRC and Quartz LVS for advanced process nodes for several years, and have tested their accuracy using the same rigorous testing procedures we use for all DRC and LVS tools," said Tom Quan, deputy director of Design Service Marketing at TSMC. "In response to customer demand, we have now expanded support for Quartz DRC and Quartz LVS to include 180 nm."
Quartz DRC and Quartz LVS are architected to process integrated circuit (IC) designs of any size, at any technology node, in the least amount of time. Magma's is the first truly scalable physical verification solution, able to provide turnaround time that is up to an order of magnitude faster than existing solutions.
The Quartz tools are fully compatible with third-party IC implementation flows and can read file formats used by traditional physical verification tools.
"TSMC has been a key foundry partner with Magma, and our mutual customers have used Quartz physical verification solutions to tape out some of the largest, most aggressive designs in the world," said Anirudh Devgan, general manager of Magma's Custom Design Business Unit.
"Many ICs are still being implemented in lower-cost 180-nm processes. Now that TSMC has made 180-nm rule decks available, more designers will be able to leverage the speed and accuracy of Quartz DRC and Quartz LVS."
Showing posts with label Quartz LVS. Show all posts
Showing posts with label Quartz LVS. Show all posts
Tuesday, 29 September 2009
Thursday, 30 July 2009
Magma Quartz DRC and Quartz LVS support TSMC’s unified physical verification format
BANGALORE, INDIA: Magma Design Automation Inc. announced that Quartz DRC and Quartz LVS now support TSMC’s interoperable design rule check (iDRC) and layout-versus-schematic (iLVS).
With the two unified electronic design automation (EDA) data formats and scalable Quartz physical verification solution, Magma and TSMC are working to make their mutual customers’ adoption of TSMC’s 40nm process technology faster, easier and less costly.
"TSMC has taken a leadership role in defining an interoperable, common language for all DRC and LVS tools," said ST Juang, senior director of Design Infrastructure Marketing at TSMC.
“The unified iDRC and iLVS files eliminate the need to develop and maintain multiple custom runsets, improve data accuracy and consistency, and enables designers to choose the EDA tool that best meets their requirements. Ultimately, our customers can adopt our advanced process technologies early for their designs.”
Quartz DRC and Quartz LVS are architected to process integrated circuit (IC) designs of any size, at any technology node, in the least amount of time. Magma's is the first truly scalable physical verification solution, able to provide turnaround time that is up to an order of magnitude faster than existing solutions by leveraging existing compute resources.
The Quartz tools are fully compatible with third-party IC implementation flows and can read file formats used by traditional physical verification tools.
“The scalable architecture of Quartz DRC and Quartz LVS was designed specifically to provide fast, efficient physical verification of large, complex designs,” said Anirudh Devgan, general manager of Magma’s Custom Design Business Unit.
“That scalability and native support for the Tcl procedural language used by the TSMC iDRC and iLVS formats make Quartz DRC and Quartz LVS the ideal solution for designs targeting TSMC’s processes.”
With the two unified electronic design automation (EDA) data formats and scalable Quartz physical verification solution, Magma and TSMC are working to make their mutual customers’ adoption of TSMC’s 40nm process technology faster, easier and less costly.
"TSMC has taken a leadership role in defining an interoperable, common language for all DRC and LVS tools," said ST Juang, senior director of Design Infrastructure Marketing at TSMC.
“The unified iDRC and iLVS files eliminate the need to develop and maintain multiple custom runsets, improve data accuracy and consistency, and enables designers to choose the EDA tool that best meets their requirements. Ultimately, our customers can adopt our advanced process technologies early for their designs.”
Quartz DRC and Quartz LVS are architected to process integrated circuit (IC) designs of any size, at any technology node, in the least amount of time. Magma's is the first truly scalable physical verification solution, able to provide turnaround time that is up to an order of magnitude faster than existing solutions by leveraging existing compute resources.
The Quartz tools are fully compatible with third-party IC implementation flows and can read file formats used by traditional physical verification tools.
“The scalable architecture of Quartz DRC and Quartz LVS was designed specifically to provide fast, efficient physical verification of large, complex designs,” said Anirudh Devgan, general manager of Magma’s Custom Design Business Unit.
“That scalability and native support for the Tcl procedural language used by the TSMC iDRC and iLVS formats make Quartz DRC and Quartz LVS the ideal solution for designs targeting TSMC’s processes.”
Tuesday, 5 May 2009
Magma launches 'Liberate Me' program for Quartz DRC and Quartz LVS
SAN JOSE, USA: Magma Design Automation Inc. announced the availability of the Quartz DRC and Quartz LVS 2009.05 physical verification tools.
This new version dramatically improves designer productivity and includes functionality improvements for advanced process nodes, including 45/40 and 32/28 nanometer, through optimizations specifically targeted for standard multi-core, multi-CPU computers.
To ease adoption, this version offers improved compatibility with third-party legacy physical verification tools. Magma also announced the "Liberate Me" program, enabling engineers to test drive Quartz DRC and Quartz LVS at no charge for 60 days.
When integrated with Magma's Talus platform for digital implementation, Quartz DRC and Quartz LVS can slash one to two weeks off the tapeout cycle by eliminating all iterations between physical design, and physical verification. Timing and design for manufacturing (DFM) surprises are also eliminated because in-situ metal fill, hotspot fixing and other chip finishing operations are performed within Talus.
"Design complexity more than doubles with every process node. Without significant tool enhancements, designer productivity can plummet," said Anirudh Devgan, general manager of Magma's Custom Design Business Unit. "With the performance improvements in the latest release of the Quartz physical verification solutions, Magma extends its technology leadership and enables designers to dramatically shorten project cycles, especially when compared to third-party legacy tools."
"Liberate Me" free trial program
To free designers from the runtime bottlenecks of legacy tools and make it easier for them to leverage the Quartz tools' advanced technology to accelerate physical verification of large ICs (ICs), Magma launched the "Liberate Me" program.
This program offers a free 60-day trial of the latest versions of Quartz DRC and Quartz LVS. Engineers can request the software at www.magma-da.com/liberate-me.
This new version dramatically improves designer productivity and includes functionality improvements for advanced process nodes, including 45/40 and 32/28 nanometer, through optimizations specifically targeted for standard multi-core, multi-CPU computers.
To ease adoption, this version offers improved compatibility with third-party legacy physical verification tools. Magma also announced the "Liberate Me" program, enabling engineers to test drive Quartz DRC and Quartz LVS at no charge for 60 days.
When integrated with Magma's Talus platform for digital implementation, Quartz DRC and Quartz LVS can slash one to two weeks off the tapeout cycle by eliminating all iterations between physical design, and physical verification. Timing and design for manufacturing (DFM) surprises are also eliminated because in-situ metal fill, hotspot fixing and other chip finishing operations are performed within Talus.
"Design complexity more than doubles with every process node. Without significant tool enhancements, designer productivity can plummet," said Anirudh Devgan, general manager of Magma's Custom Design Business Unit. "With the performance improvements in the latest release of the Quartz physical verification solutions, Magma extends its technology leadership and enables designers to dramatically shorten project cycles, especially when compared to third-party legacy tools."
"Liberate Me" free trial program
To free designers from the runtime bottlenecks of legacy tools and make it easier for them to leverage the Quartz tools' advanced technology to accelerate physical verification of large ICs (ICs), Magma launched the "Liberate Me" program.
This program offers a free 60-day trial of the latest versions of Quartz DRC and Quartz LVS. Engineers can request the software at www.magma-da.com/liberate-me.
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