SAN JOSE, USA: IDT (Integrated Device Technology Inc.), a leading provider of essential mixed signal semiconductor solutions that enrich the digital media experience announced a favorable ruling issued by the International Trade Commission (ITC) in a patent action brought by LSI Corp. against several semiconductor companies, including IDT. In the ruling, the ITC found that the patent claims asserted by LSI were invalid.
LSI had alleged that IDT and the other defendants in the action violated section 337 of the Tariff Act which prohibits the importation and sale of infringing products. Based on the finding of invalidity, the Court held that no violation of section 337 has occurred with respect to the asserted claims.
The full ITC Commission has until November 21 to determine whether to review the initial determination of the judge or allow it to become final.
Showing posts with label patents. Show all posts
Showing posts with label patents. Show all posts
Thursday, 24 September 2009
Monday, 24 August 2009
SemiSouth announces three new SiC power JFET patents
STARKVILLE, USA: SemiSouth announced the award of its third US Patent in 2009, and 18th overall in SiC Power Electronics technology. The patents cover methods of making normally-off SiC JFETs, self-aligned SiC fabrication methods, and integration of SiC JFET, diodes, and circuits.
According to Dr. Jeff Casady, Chief Technology Officer and Vice President of Business Development, the recent patents were the result of focused efforts, led by SemiSouth engineers, in pushing the technology forward for both near-term and long-term products.
“Our normally-off SiC JFET, the most energy efficient and cost effective SiC power transistor switch, is an extremely important product to SemiSouth and its customers. After sampling the product globally for over one year, we are seeing very positive signs of adoption by our customer base in solar inverters, telecom power supplies, and other applications.”
Dr. David Sheridan, SemiSouth’s Director of Engineering, commented that “These specific patents allow us to further strength the intellectual property we have around the normally-off SiC JFET, including different process designs and methods to integrate for added chip functionality in the future.”
SiC is an emerging semiconductor technology enabling energy efficient operation of power conversion and power management in telecom power supplies, inverters in solar and high-frequency welding, future automotive electric vehicle platforms, and many other products.
The true promise of SiC is its ability to make power supplies and power inverters up to 50-75 percent more energy efficient, operate at up to four to eight times higher frequency, and as a result run cooler and be physically much smaller in size. As an example, SiC power JFETs are expected to increase the 'fuel' efficiency of hybrid electric vehicles and help make them more affordable for consumers.
According to Dr. Jeff Casady, Chief Technology Officer and Vice President of Business Development, the recent patents were the result of focused efforts, led by SemiSouth engineers, in pushing the technology forward for both near-term and long-term products.
“Our normally-off SiC JFET, the most energy efficient and cost effective SiC power transistor switch, is an extremely important product to SemiSouth and its customers. After sampling the product globally for over one year, we are seeing very positive signs of adoption by our customer base in solar inverters, telecom power supplies, and other applications.”
Dr. David Sheridan, SemiSouth’s Director of Engineering, commented that “These specific patents allow us to further strength the intellectual property we have around the normally-off SiC JFET, including different process designs and methods to integrate for added chip functionality in the future.”
SiC is an emerging semiconductor technology enabling energy efficient operation of power conversion and power management in telecom power supplies, inverters in solar and high-frequency welding, future automotive electric vehicle platforms, and many other products.
The true promise of SiC is its ability to make power supplies and power inverters up to 50-75 percent more energy efficient, operate at up to four to eight times higher frequency, and as a result run cooler and be physically much smaller in size. As an example, SiC power JFETs are expected to increase the 'fuel' efficiency of hybrid electric vehicles and help make them more affordable for consumers.
Friday, 17 July 2009
Acacia acquires patents for computer architecture, power management technologies
NEWPORT BEACH, USA: Acacia Research Corp. announced that its subsidiary, Acacia Patent Acquisition LLC, has acquired patents for computer architecture and power management technologies.
"As Acacia's licensing success grows, more patent owners are selecting us as their partner for the licensing of their patented technologies," commented Paul Ryan, Acacia Chairman and CEO.
"Acacia is rapidly becoming the leader in technology licensing and we continue to grow
our base of future revenues by adding new patent portfolios," concluded Ryan.
These patented technologies generally relate to computer architecture and power management. These technologies can be used in computers, servers, cell phones, game consoles, microprocessors and other electronic systems.
"As Acacia's licensing success grows, more patent owners are selecting us as their partner for the licensing of their patented technologies," commented Paul Ryan, Acacia Chairman and CEO.
"Acacia is rapidly becoming the leader in technology licensing and we continue to grow
our base of future revenues by adding new patent portfolios," concluded Ryan.
These patented technologies generally relate to computer architecture and power management. These technologies can be used in computers, servers, cell phones, game consoles, microprocessors and other electronic systems.
Tessera receives PTO Office Action in '627 patent re-exam
SAN JOSE, USA: Tessera Technologies Inc. has received a Final Office Action, dated July 14, 2009, from the US Patent and Trademark Office (PTO) addressing the ongoing ex parte reexamination of Tessera’s US Patent No. 6,133,627 (‘627 patent).
The office action rejected certain claims subject to reexamination and confirmed certain other claims as patentable and valid over the prior art.
In confirming certain claims added in re-examination as patentable, the PTO Examiner considered claim language based on claim constructions that have been applied in Tessera's litigations involving the '627 patent, including Investigation No. 337-TA-630 (DRAM ITC action).
Tessera has until Aug. 14, 2009, to file its response with the PTO.
The office action rejected certain claims subject to reexamination and confirmed certain other claims as patentable and valid over the prior art.
In confirming certain claims added in re-examination as patentable, the PTO Examiner considered claim language based on claim constructions that have been applied in Tessera's litigations involving the '627 patent, including Investigation No. 337-TA-630 (DRAM ITC action).
Tessera has until Aug. 14, 2009, to file its response with the PTO.
Friday, 3 July 2009
Pulsic granted routing patent as per current density rules
BRISTOL, ENGLAND: Pulsic Ltd, a leader in custom design automation (CDA), announced that it has been granted US Patent (11383658) for a unique routing innovation incorporated in its market-leading physical chip design software.
This important patent, titled “Automatic routing nets according to current density rules”, protects unique technology incorporated in Pulsic’s UniRoute automated router.
By taking into account the current required by the individual branches in a net, UniRoute is able to optimise a net’s width. This innovation creates the smallest net width that satisfies the electro-migration rules for current density.
Optimising the net widths not only eliminates the risk of electro-migration but also significantly reduces IR losses and minimises routing area. For layout engineers, this eliminates the need to estimate current densities and manually calculate varying net-widths for high fan-out interconnects.
Mark Waller, Vice President of Research and Development for Pulsic, said: “Without this technique, nets are either over-engineered and so take up too much area, or manual intervention causes current density rule violations that need to be fixed late in the design cycle. UniRoute’s unique approach optimises net width during automatic routing, taking into account current needs throughout the net and reducing branch sizes accordingly.”
UniRoute is part of Pulsic’s flagship product Unity, a complete custom design automation solution for the physical design of high volume ICs. Unity combines three other key components -- UniPlan (hierarchical floorplanning), UniPlace (placement) and UniEdit (editing) -- with timing, signal integrity, ECO and DFM functionality to provide a truly unique design environment.
Unity has been designed to increase productivity, decrease design area and increase yield for even the most challenging custom digital, mixed-signal and analog IC designs.
This important patent, titled “Automatic routing nets according to current density rules”, protects unique technology incorporated in Pulsic’s UniRoute automated router.
By taking into account the current required by the individual branches in a net, UniRoute is able to optimise a net’s width. This innovation creates the smallest net width that satisfies the electro-migration rules for current density.
Optimising the net widths not only eliminates the risk of electro-migration but also significantly reduces IR losses and minimises routing area. For layout engineers, this eliminates the need to estimate current densities and manually calculate varying net-widths for high fan-out interconnects.
Mark Waller, Vice President of Research and Development for Pulsic, said: “Without this technique, nets are either over-engineered and so take up too much area, or manual intervention causes current density rule violations that need to be fixed late in the design cycle. UniRoute’s unique approach optimises net width during automatic routing, taking into account current needs throughout the net and reducing branch sizes accordingly.”
UniRoute is part of Pulsic’s flagship product Unity, a complete custom design automation solution for the physical design of high volume ICs. Unity combines three other key components -- UniPlan (hierarchical floorplanning), UniPlace (placement) and UniEdit (editing) -- with timing, signal integrity, ECO and DFM functionality to provide a truly unique design environment.
Unity has been designed to increase productivity, decrease design area and increase yield for even the most challenging custom digital, mixed-signal and analog IC designs.
Tuesday, 26 May 2009
Hynix to post $397 million for infringing Rambus patents
LOS ALTOS, USA: Rambus Inc. announced that the US District Court for the Northern District of California has ordered Hynix Semiconductor to secure the judgment amount of approximately $397 million through a combination of a bond and a lien on a Hynix property in South Korea for infringing Rambus patents.
The bonded amount of $250 million is required to be posted within 45 days of the order. The lien will only serve as security if a new appraisal of the Hynix property shows a fair market value of at least double the amount of the judgment not secured by the bond. If the appraisal is inadequate, Rambus may ask the Court to substitute other security.
Final judgment in this matter was entered against Hynix on March 10, 2009 in the amount of approximately $134 million for infringement through December 31, 2005 and approximately $215 million for its infringement from January 1, 2006 through January 31, 2009. In addition, the Court awarded about $48M in pre-judgment interest to Rambus.
“We fully expect the judgment against Hynix to be upheld on appeal, and that we will be entitled to collect the entire amount of the judgment,” said Thomas Lavelle, senior vice president and general counsel at Rambus. “We appreciate the Court’s thoughtful consideration in this case, however, we believe Hynix should have been required to post a bond for the entire amount of the judgment. If Hynix’s proposed lien fails to show value of roughly $300 million, we will ask the Court for other security in order to protect Rambus’ interests.”
In addition, the Court ordered Hynix to pay compulsory license fees into escrow pending the outcome of the appeal Hynix filed in this matter. The Court ordered Hynix to pay Rambus royalties on net sales after January 31, 2009 and before April 18, 2010 of 1 percent for SDR SDRAM and 4.25 percent for DDR SDRAM memory devices.
The latter rate applies to DDR, DDR2, DDR3, GDDR, gDDR2 and GDDR3 SDRAM devices, as well as DDR SGRAM devices. Damages and the compulsory license apply to US infringements of the patent claims in suit.
Background of the case
This case was originally filed by Hynix against Rambus in August 2000. The Honorable Ronald M. Whyte of the U.S. District Court for the Northern District of California split the case into three separate phases with Rambus subsequently prevailing in all three phases.
During the first phase, Hynix alleged that Rambus’ patents were invalid based on the doctrine of unclean hands. The Court issued its Findings of Fact and Conclusions of Law in Rambus’ favor in January 2006. The Court reaffirmed its finding of no spoliation when it denied Hynix’s motion for reconsideration in February 2009.
The second phase dealt with Rambus’ allegations that Hynix memory products infringed its patents. In April 2006, a jury unanimously found that all 10 Rambus patent claims at issue in that trial are valid and infringed by Hynix memory products. The jury award of approximately $307 million in damages for US sales of infringing Hynix products through December 31, 2005, was subsequently reduced by the Court to approximately $134 million.
In the third and final phase of the case, Hynix (together with Micron and Nanya) tried its remaining claims and defenses against Rambus including antitrust and fraud claims based on Rambus’ participation in a standard-setting organization called JEDEC. In March 2008, a jury found Rambus had acted properly during its participation in JEDEC in the early 1990s. The Court similarly found in Rambus’ favor in a decision issued on March 3, 2009.
The bonded amount of $250 million is required to be posted within 45 days of the order. The lien will only serve as security if a new appraisal of the Hynix property shows a fair market value of at least double the amount of the judgment not secured by the bond. If the appraisal is inadequate, Rambus may ask the Court to substitute other security.
Final judgment in this matter was entered against Hynix on March 10, 2009 in the amount of approximately $134 million for infringement through December 31, 2005 and approximately $215 million for its infringement from January 1, 2006 through January 31, 2009. In addition, the Court awarded about $48M in pre-judgment interest to Rambus.
“We fully expect the judgment against Hynix to be upheld on appeal, and that we will be entitled to collect the entire amount of the judgment,” said Thomas Lavelle, senior vice president and general counsel at Rambus. “We appreciate the Court’s thoughtful consideration in this case, however, we believe Hynix should have been required to post a bond for the entire amount of the judgment. If Hynix’s proposed lien fails to show value of roughly $300 million, we will ask the Court for other security in order to protect Rambus’ interests.”
In addition, the Court ordered Hynix to pay compulsory license fees into escrow pending the outcome of the appeal Hynix filed in this matter. The Court ordered Hynix to pay Rambus royalties on net sales after January 31, 2009 and before April 18, 2010 of 1 percent for SDR SDRAM and 4.25 percent for DDR SDRAM memory devices.
The latter rate applies to DDR, DDR2, DDR3, GDDR, gDDR2 and GDDR3 SDRAM devices, as well as DDR SGRAM devices. Damages and the compulsory license apply to US infringements of the patent claims in suit.
Background of the case
This case was originally filed by Hynix against Rambus in August 2000. The Honorable Ronald M. Whyte of the U.S. District Court for the Northern District of California split the case into three separate phases with Rambus subsequently prevailing in all three phases.
During the first phase, Hynix alleged that Rambus’ patents were invalid based on the doctrine of unclean hands. The Court issued its Findings of Fact and Conclusions of Law in Rambus’ favor in January 2006. The Court reaffirmed its finding of no spoliation when it denied Hynix’s motion for reconsideration in February 2009.
The second phase dealt with Rambus’ allegations that Hynix memory products infringed its patents. In April 2006, a jury unanimously found that all 10 Rambus patent claims at issue in that trial are valid and infringed by Hynix memory products. The jury award of approximately $307 million in damages for US sales of infringing Hynix products through December 31, 2005, was subsequently reduced by the Court to approximately $134 million.
In the third and final phase of the case, Hynix (together with Micron and Nanya) tried its remaining claims and defenses against Rambus including antitrust and fraud claims based on Rambus’ participation in a standard-setting organization called JEDEC. In March 2008, a jury found Rambus had acted properly during its participation in JEDEC in the early 1990s. The Court similarly found in Rambus’ favor in a decision issued on March 3, 2009.
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