SUNNYVALE, USA: Sequence Design has announced PowerArtist-XP, the first and most comprehensive analysis-driven, automatic RTL power-reduction technology within a completely integrated environment.
IP and SoC RTL designers, without becoming power experts, can analyze, visualize and reduce power by 10-60 percent or more within minutes on multi-million instances, with 50 percent fewer RTL edits, and productivity gains of 10X at a minimum.
“Power management is a top priority and Sequence’s PowerArtist-XP is a key tool we use for power efficient RTL design flows,” said Jiebing Wang, Vice President of Acceleration Technology at Exar Corp.
“The tool has provided significant power reduction in our designs. PowerArtist-XP also has enabled our RTL designers to become power aware by providing methods to analyze and reduce power early in the design process while being easy to integrate in our design flows.”
PowerArtist-XP -– selected as a DAC 2009 “must-see” by famed analyst Gary Smith – will be showcased alongside Sequence’s complete technology lineup at this year’s DAC, Booth 3455.
The tool delivers maximum power savings, in minimum time, with the least number of RTL edits. Sequence’s new XPRT (eXtreme Power Reduction Technology) incorporated here maximizes power savings early at RTL -– the highest level of hardware abstraction enabling high productivity.
XPRT delivers the industry’s most comprehensive set of RTL power reductions yet – power reduction is not just sequential and combinational clock gating, but is also targeted for memory and datapath portions of complex SoCs and IPs.
Integrating the industry-leading PowerTheater timing-aware power analysis technology, PowerArtist-XP users now benefit from a one-stop shop for RTL power. By predicting power savings and area trade-offs upfront at RTL, single-pass power reduction identifies the highest impact RTL edits.
Productivity increases multi-fold by obviating unnecessary iterations with synthesis and implementation while decreasing the impact on area, timing closure, verification, and functional ECOs. The integrated RTL power environment also enables designers to quickly discover power bugs, manage stimulus for peak and average power, generate custom reports for power regressions using the OpenAccess database, and more.
A powerful graphical cockpit, PowerCanvas, drives power-ordered reductions while providing a wide range of tightly interlinked visual debug diagnostics that make power easy for mainstream RTL designers.
PowerArtist-XP automatically generates power-optimized RTL with surgical changes -– in addition, the versatile PowerCanvas reduction dialogs provide both flexibility and precise guidance to the RTL designers in making rapid RTL edits.
“PowerArtist has proven itself by giving us the power savings and productivity gains we need,” said Jon Gibbons, Ubicom Vice President of VLSI Engineering. “By raising the bar with PowerArtist-XP, Sequence continues to advance the state of the art in low-power design, and we look forward to working with this exciting new technology.”
“Since we launched PowerArtist at DAC last year, we saw a growing demand from customers for an integrated solution addressing power reduction more intelligently,” said Vic Kulkarni, President & CEO of Sequence.
“For sub-65nm designs, an RTL analysis-driven power reduction approach becomes very critical since surgical changes are now possible in order to achieve maximum possible power reduction with minimal area overhead and minimal ECO loops. Power reduction with analysis-driven vs. ‘blind’ automation is the only meaningful approach for designers to lower power and avoid falling in the traps of poor QoR and an excess of ineffective changes.”
PowerArtist-XP is compatible with all standard design flows, including synthesis, simulation, and formal verification, and all leading formats and constraints including Common Power Format (CPF), Unified Power Format (UPF) and Synopsys Design Constraints (SDC).
Utilizing Si2’s OpenAccess database (OADB), it uniquely allows users to have detailed access to power information to create custom reports or automate proprietary power reductions through an open Tcl API.
PowerArtist-XP is in production now. North America list pricing starts at $220,000 for a one-year TBL.
Showing posts with label UPF. Show all posts
Showing posts with label UPF. Show all posts
Monday, 20 July 2009
Tuesday, 1 July 2008
Tackling low-power design issues -- Synopsys
Managing power efficiently is not a choice, but an imperative. Semiconductor content is increasing everywhere, and in fact, consumers and globalization are driving the semiconductor content in electronic systems.
A glance at the ecosystem pyramid reveals that the global electronics industry stands at US$3,200 billion, semiconductors at US$274 billion, equipment and materials at US$86 billion, and EDA at US$4.4 billion. EDA is at the heart of the electronics industry.
Subhash Bal, country director, Synopsys (India) EDA Software Pvt. Ltd, says that for low power imperatives, it is important to look at systemic factors. Energy usage and carbon emissions, especially, have been growing alarmingly, and will continue to do so for quite some time. This is largely due to uncontrolled consumption of devices and other electronic equipment. "We need to support energy usage without carbon emissions. In that respect, solar is a good solution," he adds.
Computing is energy intensive by nature. Consider these stats -- approximately 1 billion of the world's PCs are switched on for nine hours per day, requiring 95,000MW. And of the US$250 billion spent globally each year powering computers, about 85 percent of that energy is wasted, while the computer stands idle.
Today, more devices and gadgets are being introduced, with more features and at lower prices. All of these devices demand a huge amount of battery power. Speed increases at the expense of energy consumption. Leakage has also become a major issue. There is therefore a growing need to solve power-related problems.
The Synopsys Sentaurus
Synopsys' Sentaurus optimizes a device's power. It also addresses photovoltaics. The Sentaurus process is an advanced 1D, 2D, and 3D process simulator for developing and optimizing silicon and compound semiconductor process technologies.
Created by combining features from Synopsys and former ISE TCAD products, together with a wide range of new features and capabilities, Sentaurus is a new-generation process simulator for addressing the challenges found in current and future process technologies. "The Sentaurus takes care of the processing part. It does modeling, 2D/3D simulation, etc. It can be applied to both semiconductors and solar," says Bal.
Eclypse low-power solution
Synopsys' goal is to deliver the most comprehensive solution, enabling designers to build the most advanced, low power chips and systems in the world. In the hope of achieving this, it has introduced the Eclypse low-power solution. Sharat D Kaul, sales and marketing manager, Synopsys India, highlights the fact that the Eclypse looks at the design side specifically.
The silicon-level concerns include factors such as more functionality, more computing power, limited power budget, design complexity, verification complexity, testing, reliability and schedule. System-level concerns include factors such as battery life, system cooling, reliability, packaging cost, operating cost, air conditioning cost, carbon footprint and green initiatives. Most design teams are both overwhelmed and under prepared.
The Eclypse low power solution is aimed at addressing such needs. It provides an alignment of technology, IP, methodology, services and industry standards -- geared to meet the challenges of advanced low power designs.
Eclypse supports the industry-standard Unified Power Format (UPF) language, used to capture low power design requirements. It offers low power education programs, end-to-end UPF support, multi-voltage verification with assertions, automated clock tree synthesis, and automated power switch optimization.
A glance at the ecosystem pyramid reveals that the global electronics industry stands at US$3,200 billion, semiconductors at US$274 billion, equipment and materials at US$86 billion, and EDA at US$4.4 billion. EDA is at the heart of the electronics industry.
Subhash Bal, country director, Synopsys (India) EDA Software Pvt. Ltd, says that for low power imperatives, it is important to look at systemic factors. Energy usage and carbon emissions, especially, have been growing alarmingly, and will continue to do so for quite some time. This is largely due to uncontrolled consumption of devices and other electronic equipment. "We need to support energy usage without carbon emissions. In that respect, solar is a good solution," he adds.
Computing is energy intensive by nature. Consider these stats -- approximately 1 billion of the world's PCs are switched on for nine hours per day, requiring 95,000MW. And of the US$250 billion spent globally each year powering computers, about 85 percent of that energy is wasted, while the computer stands idle.
Today, more devices and gadgets are being introduced, with more features and at lower prices. All of these devices demand a huge amount of battery power. Speed increases at the expense of energy consumption. Leakage has also become a major issue. There is therefore a growing need to solve power-related problems.
The Synopsys Sentaurus
Synopsys' Sentaurus optimizes a device's power. It also addresses photovoltaics. The Sentaurus process is an advanced 1D, 2D, and 3D process simulator for developing and optimizing silicon and compound semiconductor process technologies.
Created by combining features from Synopsys and former ISE TCAD products, together with a wide range of new features and capabilities, Sentaurus is a new-generation process simulator for addressing the challenges found in current and future process technologies. "The Sentaurus takes care of the processing part. It does modeling, 2D/3D simulation, etc. It can be applied to both semiconductors and solar," says Bal.
Eclypse low-power solution
Synopsys' goal is to deliver the most comprehensive solution, enabling designers to build the most advanced, low power chips and systems in the world. In the hope of achieving this, it has introduced the Eclypse low-power solution. Sharat D Kaul, sales and marketing manager, Synopsys India, highlights the fact that the Eclypse looks at the design side specifically.
The silicon-level concerns include factors such as more functionality, more computing power, limited power budget, design complexity, verification complexity, testing, reliability and schedule. System-level concerns include factors such as battery life, system cooling, reliability, packaging cost, operating cost, air conditioning cost, carbon footprint and green initiatives. Most design teams are both overwhelmed and under prepared.
The Eclypse low power solution is aimed at addressing such needs. It provides an alignment of technology, IP, methodology, services and industry standards -- geared to meet the challenges of advanced low power designs.
Eclypse supports the industry-standard Unified Power Format (UPF) language, used to capture low power design requirements. It offers low power education programs, end-to-end UPF support, multi-voltage verification with assertions, automated clock tree synthesis, and automated power switch optimization.
Subscribe to:
Posts (Atom)
