SEMICON West 2009, SAN FRANCISCO, USA: Semiconductor Research Corp. (SRC), the world’s leading university-research consortium for semiconductors and related technologies, teamed with the National Science Foundation (NSF) to announce funding of $2 million in new supplemental grants for nanoelectronics research.
Researchers at six major NSF centers inside leading US universities will contribute to the goal of finding a replacement for the transistor -– the foundational building block of computing technology for decades -– and discovering a new digital switching mechanism using nanoelectronics innovation.
During his presentation at Semicon West, Dr. Jeff Welser, director, Nanoelectronics Research Initiative (NRI) for SRC, will express the importance of this research to the semiconductor industry, national competitiveness and the world.
“There is no question semiconductor technology has played a critical role in driving the global economy for the past half century,” said Welser.
“But the current transistor technology is rapidly reaching its limits, and long-term fundamental research is needed now to be ready for 2020 and beyond. The joint NSF-NRI projects put the country’s best minds together for a common goal –- finding a new device that will continue our leadership in the nanoelectronics era.”
Until recently, manufacturers were able to double the number of transistors on a chip at half the power for each transistor by shrinking them smaller and smaller in each new generation of semiconductor technology. However, it is becoming increasingly difficult to continue decreasing the power needed to turn the device off and on, making it difficult to continue the pace of product innovation from scaling alone.
“These investments in nanoelectronics align closely with NSF’s support for engineering and scientific research that furthers discovery,” said Dr. Lawrence Goldberg, senior engineering advisor at NSF. “We believe these grants, which support graduate students and postdoctoral associates, will create innovative technologies and help find a solution to this significant issue facing the semiconductor industry today.”
The joint NSF-NRI supplemental grants were awarded to teams at six NSF centers in nanoelectronics research:
* Network for Computational Nanotechnology, directed by Dr. Mark Lundstrom at Purdue University, working with Kaushik Roy and Supriyo Datta.
* Center for Integrated Nanomechanical Systems (COINS), a Nanoscale Science and Engineering Center, directed by Dr. Alex Zettl at University of California at Berkeley, working with Sayeef Salahuddin and Jeffrey G. Grossman.
* Center for Materials Science and Engineering, a Materials Research Science and Engineering Center, directed by Dr. Michael Rubner at Massachusetts Institute of Technology, working with Caroline Ross and Stuart Wolf (University of Virginia).
* Northwestern University Materials Research Center, a Materials Research Science and Engineering Center, directed by Dr. Monica Olvera de la Cruz at Northwestern University, working with Mark Hersam.
* Center for Advanced Materials Research, a Materials Research Science and Engineering Center, directed by Dr. William Curtin at Brown University, working with Rod Beresford.
* Center for Materials for Information Technology, a Materials Research Science and Engineering Center, directed and led by Dr. William Butler at the University of Alabama.
The NSF-NRI grants are for three years and are, in addition to the 18 grants made to NSF centers over the last three years, expanding and strengthening the commitment to the program.
Companies participating in NRI are GLOBALFOUNDRIES, IBM, Intel, Micron Technology and Texas Instruments. These companies will assign researchers to collaborate with the university teams.
Strong interactions with the NSF-supported centers will be instrumental in NRI reaching its goal of demonstrating the feasibility of novel computing devices in simple computer circuits during the next five to 10 years.
Showing posts with label Semicon West 2009. Show all posts
Showing posts with label Semicon West 2009. Show all posts
Wednesday, 15 July 2009
Tuesday, 14 July 2009
HamaTech’s MaskTrack Pro system for next generation lithography
SEMICON West 2009, STERNENFELS, GERMANY: HamaTech Advanced Process Equipment (APE) GmbH & Co. KG, announced its most advanced photomask processing system, the MaskTrack Pro, which extends the technology of HamaTech’s highly successful MaskTrack System to Next Generation Lithography applications; 193i 22nm half pitch (hp), Extreme Ultraviolet Lithography (EUVL) and Nano-Imprint Lithography (NIL).
Key to MaskTrack Pro is state-of–the-art cleaning technology that delivers unmatched particle removal down to 20nm while protecting 100 percent of the vulnerable mask structures and materials.
“Without the mask the lithography process cannot begin and without a pristine, defect-free mask at the point-of-exposure the probability of yield loss on Next Generation Lithography processes is a fact” said Wilma Koolen-Hermkens, Chief Executive Officer of HamaTech APE
“Mask Track Pro is the first system in the industry that can fully address zero particle and defect tolerance levels on the mask prior to exposure. We are encouraged by the positive response received from Semiconductor IDM’s and OEM’s that require the capabilities of the MaskTrack Pro to eliminate a key barrier of entry for new Lithography methods.”
MaskTrack Pro combines innovative cleaning technology with sophisticated platform design for a mask integrity system ready to meet the production challenges of 193i 22nm hp DPT, EUVL and NIL.
A unique combination of physical and chemical cleaning technologies enables customers to effectively remove organic and inorganic contamination without damage to the vulnerable features and material structures of the reticle.
Focused Spot Cleaning, a feature for the precise removal of particles in defined areas of the mask, saves significant time after repair and eliminates the toughest overlay issues caused by backside contamination. The new MaskTrack Pro design allows clustering of metrology systems and pod-in-pod stocking for a holistic mask management approach throughout the life of the mask.
MaskTrack Pro’s distinctive approach to mask integrity ensures that the mask is defect-free at exposure, offering customers a dramatic increase in tool productivity and uptime.
Over 500 HamaTech systems, including MaskTrack, have been shipped to semiconductor manufacturers and mask shops worldwide.
Key to MaskTrack Pro is state-of–the-art cleaning technology that delivers unmatched particle removal down to 20nm while protecting 100 percent of the vulnerable mask structures and materials.
“Without the mask the lithography process cannot begin and without a pristine, defect-free mask at the point-of-exposure the probability of yield loss on Next Generation Lithography processes is a fact” said Wilma Koolen-Hermkens, Chief Executive Officer of HamaTech APE
“Mask Track Pro is the first system in the industry that can fully address zero particle and defect tolerance levels on the mask prior to exposure. We are encouraged by the positive response received from Semiconductor IDM’s and OEM’s that require the capabilities of the MaskTrack Pro to eliminate a key barrier of entry for new Lithography methods.”
MaskTrack Pro combines innovative cleaning technology with sophisticated platform design for a mask integrity system ready to meet the production challenges of 193i 22nm hp DPT, EUVL and NIL.
A unique combination of physical and chemical cleaning technologies enables customers to effectively remove organic and inorganic contamination without damage to the vulnerable features and material structures of the reticle.
Focused Spot Cleaning, a feature for the precise removal of particles in defined areas of the mask, saves significant time after repair and eliminates the toughest overlay issues caused by backside contamination. The new MaskTrack Pro design allows clustering of metrology systems and pod-in-pod stocking for a holistic mask management approach throughout the life of the mask.
MaskTrack Pro’s distinctive approach to mask integrity ensures that the mask is defect-free at exposure, offering customers a dramatic increase in tool productivity and uptime.
Over 500 HamaTech systems, including MaskTrack, have been shipped to semiconductor manufacturers and mask shops worldwide.
Applied Materials: Innovation, industry collaboration vital to keeping Moore’s Law alive
SEMICON West 2009, SANTA CLARA, USA: While the current economic environment is imposing severe constraints on the semiconductor equipment industry, the primary driver for increasing profitability for leading-edge chipmakers is still Moore’s Law.
However, moving to the next technology node will require even higher levels of R&D investment to overcome key technical barriers. The semiconductor equipment industry must find ways to make today’s reduced R&D budgets meet these challenges.
“The current size of the wafer fabrication equipment industry does not support the significant levels of R&D spending needed to follow Moore’s Law and deliver leading-edge systems and processes to customers. This is becoming an increasingly evident as logic, DRAM and flash technologies continue to diverge,” said Tom St. Dennis, senior vice president and general manager of Applied’s Silicon Systems Group.
“To support our customers in advancing their technology roadmaps and provide critical customer services, we see the need for new business models and alliances to optimize the utilization of our industry’s resources.”
At SEMICON West in San Francisco this week, Applied Materials, Inc. will focus on the strategies and technologies that will be needed for the semiconductor industry to successfully navigate these challenging times.
In an important ITRS keynote panel on July 15, moderated by George Scalise, president of the SIA, St. Dennis will join a panel of experts representing a cross-section of the industry who will explore the impact of business model shifts on “the Future of Innovation.”
Tom St. Dennis will also be featured at SEMI’s press luncheon panel on July 14 where he will provide insights into how the macroeconomic environment, market drivers and cleantech are influencing the pace and direction of R&D in semiconductor technology.
At SEMI’s popular TechXPOT seminars, Applied will present key strategies from three-dimensional (3-D) TSV* chip packaging to cutting-edge unit process technologies. 3-D IC integration is a new way for chip designers to deliver higher density, lower power consumption devices without necessarily scaling the technology node.
Applied’s technologists will also share the latest advances in fabrication technology, including novel epitaxial processes for boosting transistor performance and innovations to extend PVD technology to the 22nm node and beyond without employing risky new integration schemes.
However, moving to the next technology node will require even higher levels of R&D investment to overcome key technical barriers. The semiconductor equipment industry must find ways to make today’s reduced R&D budgets meet these challenges.
“The current size of the wafer fabrication equipment industry does not support the significant levels of R&D spending needed to follow Moore’s Law and deliver leading-edge systems and processes to customers. This is becoming an increasingly evident as logic, DRAM and flash technologies continue to diverge,” said Tom St. Dennis, senior vice president and general manager of Applied’s Silicon Systems Group.
“To support our customers in advancing their technology roadmaps and provide critical customer services, we see the need for new business models and alliances to optimize the utilization of our industry’s resources.”
At SEMICON West in San Francisco this week, Applied Materials, Inc. will focus on the strategies and technologies that will be needed for the semiconductor industry to successfully navigate these challenging times.
In an important ITRS keynote panel on July 15, moderated by George Scalise, president of the SIA, St. Dennis will join a panel of experts representing a cross-section of the industry who will explore the impact of business model shifts on “the Future of Innovation.”
Tom St. Dennis will also be featured at SEMI’s press luncheon panel on July 14 where he will provide insights into how the macroeconomic environment, market drivers and cleantech are influencing the pace and direction of R&D in semiconductor technology.
At SEMI’s popular TechXPOT seminars, Applied will present key strategies from three-dimensional (3-D) TSV* chip packaging to cutting-edge unit process technologies. 3-D IC integration is a new way for chip designers to deliver higher density, lower power consumption devices without necessarily scaling the technology node.
Applied’s technologists will also share the latest advances in fabrication technology, including novel epitaxial processes for boosting transistor performance and innovations to extend PVD technology to the 22nm node and beyond without employing risky new integration schemes.
Monday, 13 July 2009
Mentor's Walden Rhines keynoter at Semicon West
SEMICON West 2009, WILSONVILLE, USA: Mentor Graphics Corp. today announced that Dr. Walden C. Rhines, Chairman and CEO, will present the following keynote at Semicon West 2009 in San Francisco, CA.
Who: Dr. Walden C. Rhines, Chairman and CEO, Mentor Graphics
What: Presenting “World Semiconductor Dynamics: Myth vs. Reality”
When: Tuesday, July 14, 9:00 AM – 9:45 AM
Where: Novellus Theatre at the Yerba Buena Center for the Arts (across from Moscone Center)
In his keynote address, Dr. Rhines explores some of the issues confronting the EDA industry in today’s tough economic environment and presents historical data and trends of the semiconductor industry with conclusions that may surprise you.
Who: Dr. Walden C. Rhines, Chairman and CEO, Mentor Graphics
What: Presenting “World Semiconductor Dynamics: Myth vs. Reality”
When: Tuesday, July 14, 9:00 AM – 9:45 AM
Where: Novellus Theatre at the Yerba Buena Center for the Arts (across from Moscone Center)
In his keynote address, Dr. Rhines explores some of the issues confronting the EDA industry in today’s tough economic environment and presents historical data and trends of the semiconductor industry with conclusions that may surprise you.
Applied Materials creates path for future technology innovators
SEMICON West 2009, SANTA CLARA, USA: Applied Materials Inc. will emphasize the urgency of preparing students for the high tech jobs of the future during SEMICON West, held in San Francisco this week.
The company will also discuss how a shortage of talent may affect the industry and America’s position as a global technology leader. Additionally, Applied Materials will underscore its strong commitment to the semiconductor industry by highlighting the Applied Materials Foundation Women in Science and Technology Scholarship Program designed to encourage participation by women in science and engineering.
Also being showcased are successful initiatives promoting math, science and semiconductor technology education that are helping develop future technology innovators.
“As a global leader in a fast-changing and competitive marketplace, Applied Materials is constantly innovating and commercializing products to stay ahead of future technology trends,” said Tom St. Dennis, senior vice president and general manager of Applied Materials’ Silicon Systems Group.
“We need the best and brightest talent—the challenge for our educational system is to produce the workforce with the skills and knowledge required by the industry. We believe women can be a source of that talent in greater numbers if they are encouraged early in their education.”
To promote engagement in the industry and raise awareness of technical advances, Applied Materials and the Applied Materials Foundation are supporting several workforce development programs around the world that build bridges between schools and business.
Women in Science and Technology Scholarship Program
To help realize the full potential of the workforce of tomorrow, the Applied Materials Foundation has launched the Women in Science and Technology Scholarship Program to encourage young women to excel in specific technical areas leading to careers in science and engineering.
Grants will be made to selected student organizations at United States-based universities that are committed to developing the next generation of women engineers.
SEMI Foundation’s High Tech U
Applied Materials and the Applied Materials Foundation are long-time supporters of SEMI Foundation’s High Tech U for students and SEMI High Tech U Teacher Edition programs.
In a fun, three-day interactive session, students learn semiconductor manufacturing concepts and microchip logic and get a chance to understand career choices available in math and science-based professions. Students also learn about the design and physics of solar cells.
The teacher program mirrors the student session, with an emphasis on ways educators can implement program activities into their lesson plans. A primary objective of the program is to help teachers learn about math and science-based careers in high tech fields so they can advise students about educational options and career pathways.
“Applied Materials and its Foundation have supported our industry and this program from the very beginning, and in less than a decade this program has helped reach several thousand students and teachers,” said Stan Myers, president and CEO of Semiconductor Equipment and Materials International (SEMI).
“The goal is to build interest and excitement in young people about math and science careers and help develop the skilled workforce of tomorrow working on next generation technologies.”
Since 2001, 90 High Tech U programs have been delivered reaching approximately 2,400 students directly. An additional 41,000 students have been reached through the 476 teachers who have participated in High Tech U Teacher programs.
Industry Initiatives for Science and Math Education
The goal of Industry Initiatives for Science and Math Education (IISME) is to provide teachers with professional development experiences to gain additional learning and understanding of high tech practices to incorporate into their course curricula to help better prepare a strong, highly skilled workforce in math, science and technological fields.
Applied Materials, a long and active supporter of IISME, has hosted 90 Teacher Fellows since 1994. This summer nine IISME Fellows will work at Applied Materials on a variety of projects and will attend SEMICON West to learn about the latest trends and technologies driving nanomanufacturing technology into the future.
The company will also discuss how a shortage of talent may affect the industry and America’s position as a global technology leader. Additionally, Applied Materials will underscore its strong commitment to the semiconductor industry by highlighting the Applied Materials Foundation Women in Science and Technology Scholarship Program designed to encourage participation by women in science and engineering.
Also being showcased are successful initiatives promoting math, science and semiconductor technology education that are helping develop future technology innovators.
“As a global leader in a fast-changing and competitive marketplace, Applied Materials is constantly innovating and commercializing products to stay ahead of future technology trends,” said Tom St. Dennis, senior vice president and general manager of Applied Materials’ Silicon Systems Group.
“We need the best and brightest talent—the challenge for our educational system is to produce the workforce with the skills and knowledge required by the industry. We believe women can be a source of that talent in greater numbers if they are encouraged early in their education.”
To promote engagement in the industry and raise awareness of technical advances, Applied Materials and the Applied Materials Foundation are supporting several workforce development programs around the world that build bridges between schools and business.
Women in Science and Technology Scholarship Program
To help realize the full potential of the workforce of tomorrow, the Applied Materials Foundation has launched the Women in Science and Technology Scholarship Program to encourage young women to excel in specific technical areas leading to careers in science and engineering.
Grants will be made to selected student organizations at United States-based universities that are committed to developing the next generation of women engineers.
SEMI Foundation’s High Tech U
Applied Materials and the Applied Materials Foundation are long-time supporters of SEMI Foundation’s High Tech U for students and SEMI High Tech U Teacher Edition programs.
In a fun, three-day interactive session, students learn semiconductor manufacturing concepts and microchip logic and get a chance to understand career choices available in math and science-based professions. Students also learn about the design and physics of solar cells.
The teacher program mirrors the student session, with an emphasis on ways educators can implement program activities into their lesson plans. A primary objective of the program is to help teachers learn about math and science-based careers in high tech fields so they can advise students about educational options and career pathways.
“Applied Materials and its Foundation have supported our industry and this program from the very beginning, and in less than a decade this program has helped reach several thousand students and teachers,” said Stan Myers, president and CEO of Semiconductor Equipment and Materials International (SEMI).
“The goal is to build interest and excitement in young people about math and science careers and help develop the skilled workforce of tomorrow working on next generation technologies.”
Since 2001, 90 High Tech U programs have been delivered reaching approximately 2,400 students directly. An additional 41,000 students have been reached through the 476 teachers who have participated in High Tech U Teacher programs.
Industry Initiatives for Science and Math Education
The goal of Industry Initiatives for Science and Math Education (IISME) is to provide teachers with professional development experiences to gain additional learning and understanding of high tech practices to incorporate into their course curricula to help better prepare a strong, highly skilled workforce in math, science and technological fields.
Applied Materials, a long and active supporter of IISME, has hosted 90 Teacher Fellows since 1994. This summer nine IISME Fellows will work at Applied Materials on a variety of projects and will attend SEMICON West to learn about the latest trends and technologies driving nanomanufacturing technology into the future.
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