Altera Q2 results: Sales up 6pc from prior quarter

SAN JOSE, USA: Altera Corp. announced second quarter sales of $279.2 million, up 6 percent from the first quarter of 2009 and down 22 percent from the second quarter of 2008. New products grew 16 percent sequentially.

Second quarter net income was $47.4 million, $0.16 per diluted share, up from net income of $44.0 million, $0.15 per diluted share, in the first quarter of 2009 and down from $98.0 million, $0.32 per diluted share, in the second quarter of 2008.

Second quarter 2009 tax expense includes an additional $11.5 million charge as a result of a United States court ruling announced during the quarter related to worldwide equity compensation cost sharing. Altera was not a party to the case. The additional tax expense reduced second quarter earnings by $0.04 per diluted share.

Year-to-date cash flow from operating activities was $90.9 million. Altera ended the quarter with $1.3 billion in cash and short-term investments.

Altera’s board of directors has declared a quarterly cash dividend of $0.05 per share payable on September 1, 2009 to stockholders of record on August 10, 2009.

"With a more than doubling of our 40-nm sales and surging 65-nm sales, new products resumed sequential growth and drove our top line results this quarter," said John Daane, president, chief executive officer, and chairman of the board. "Combined, our three 40-nm FPGA families continue to set design win value records. We believe that these newest Altera FPGAs will be our most successful ever."

Several recent accomplishments mark the company’s continuing progress.

With the arrival of the newest members of the Stratix IV GT FPGA family, Altera is now shipping the industry's highest density and highest bandwidth FPGAs.

These 40-nm FPGAs feature 11.3-Gbps transceivers and 530K logic elements (LEs). Stratix IV GT FPGAs support next-generation 40G/100G technologies used in communications systems, military systems, and high-end test equipment.

The unprecedented density and bandwidth in Stratix IV GT FPGAs provide designers of 40G/100G applications the flexibility to incorporate traffic management, packet processing, and their own custom functionality into a single device.

Telecommunications industry OEMs are quickly ramping their new 40G/100G networks to handle HDTV and Internet video broadband content. Stratix IV GT FPGAs deliver a single-chip solution that is optimized specifically to address the demanding bandwidth requirements of this emerging market.

Altera now is shipping its third 40-nm FPGA, the Arria II GX family. Optimized for midrange applications in broadcast, communications, and military systems, the Arria II GX family features fast core performance combined with a cost-optimized 3-Gbps transceiver architecture. With logic densities ranging from 20K–260K LEs, and over 8 Mbits of RAM, this new product offering complements the Stratix IV GX and GT flagship families.

Altera announced the immediate availability of its latest addition to the Cyclone FPGA series — the Cyclone III LS family. This new device family offers the lowest power FPGA that includes security features, including anti-tamper, design security, and design separation.

These devices are the lowest power FPGAs at less than 0.25W of static power for 200K LEs. These devices address challenging security and power requirements in military and industrial markets. The software is publicly available, and the first devices are shipping now.

Business Outlook for the Third Quarter 2009
Sequential Sales Growth Down 1% to 5%
Gross Margin 67% +/- .5%
R&D $67 to $69 million
SG&A $55 to $57 million
Other Income Approximately $0.5 million
Tax Rate 13% to 14%

Altera announces Cyclone III LS FPGAs

SAN JOSE, USA: Expanding its leadership position in low-power solutions, Altera Corp. today announced a new low-power FPGA family with security features.

The Altera Cyclone III LS FPGAs offer the highest logic, memory, and DSP density per board area. These devices are the lowest power FPGAs at less than 0.25W of static power for 200K logic elements (LEs). The Cyclone III LS FPGAs, which are shipping now, target power and board-space-sensitive applications in all market segments including military and industrial.

The security features of the Cyclone III LS FPGA include a comprehensive information-assurance design suite that offers anti-tamper, design-security and design-separation capabilities.

To protect highly sensitive information, the Cyclone III LS FPGAs' anti-tamper features include JTAG port protection, tamper monitoring, and cyclical redundancy check (CRC). Offering another layer of protection, these devices feature a proven industry-standard AES 256-bit encryption key for design security.

Where size, weight, and power (SWaP) requirements are crucial, the design-separation feature of the Cyclone III LS FPGA enables high-assurance and industrial-safety applications in a single chip through logic, routing and I/O bank separation.

"The secret to the Cyclone series’ success has been a strong focus on customer applications, which allows Altera to supply the right mix of low power, high functionality, and small form-factor solutions," said Luanne Schirrmeister, senior director of component product marketing at Altera.

"The introduction of the Cyclone III LS devices extends Altera’s low-power leadership and specifically addresses the security needs that are paramount for the military and industrial markets. We're offering a complete solution that protects against IP theft and tampering."

Cyclone III LS FPGAs allow a single-chip solution for next-generation military applications such as software-defined radio (SDR), crypto-subsystems, and crypto modernization equipment where long battery life, density at the lowest power, and small board space are required.

The additional security features of the Cyclone III LS FPGAs give designers of secure communications applications the assurance that their information will be protected with anti-tamper technology.

Unique features of the Cyclone III LS FPGA also provide the optimal solution for industrial applications, specifically motion control, Industrial Ethernet, and industrial safety. Using the design-separation feature lowers system power and increases integration while offering design redundancy for safety-critical applications.

Cyclone III LS devices are shipping now. All of the devices will be supported in the Quartus II software version 9.0 SP2.