SAN JOSE, USA & ST. ALBANS, ENGLAND: Initio, a leading provider of high-quality cost-effective ICs and solutions for storage devices, has taken an ARC 600 license to address the explosive growth USB 3.0 and solid state drive (SSD) controller market.
The ARC 600 will be embedded within USB 3.0 bridge controllers and SSD controllers to provide a Serial ATA2 to USB 3.0 Bridge and/or individual SATA2 and USB 3.0 outputs.
The ARC 600 replaces an 8051 which is overwhelmed by the processing requirements of this application. The ARC 600 also has the advantage of occupying the same silicon area and operating at the same level of power as the 8051 it replaces.
The USB 3.0 (SuperSpeed USB) market is expected to begin shipping as discrete silicon this year with broad deployment of SuperSpeed USB-enabled products expected in 2010 according to market research firm In-Stat.
The interface will target applications requiring high rates and volumes of data transfer, such as external storage, consumer electronics, and communications devices with increasing amounts of storage.
The replacement potential for USB 3.0 is enormous. In-Stat counts more than 2.6 billion USB-enabled devices shipped in 2007 and expects annual shipment growth of USB-enabled devices through 2012 to be 8.3 percent. SSD unit shipments will also enjoy strong growth. IDC predicts a compound annual growth rate (CAGR) of 76 percent from 2007-2012.
“We’re extremely pleased with the performance of the ARC 600 in our USB 3.0 chip design,” said Jui Liang CEO at Initio Corp. “The core provides just the right silicon area and power consumption for the solid state disk controller and USB 3.0 application. It has more than enough processing power to handle the 5.0 Gbit/s data rate of USB 3.0 as well as the more complex USB 3.0 control logic.”
“We’re thrilled to be part of Initio’s innovative new silicon design in the two high growth applications of SSD control and the USB 3.0 interface,” said Serene Shaw, Greater China Sales Director at ARC International.
“The ARC 600 is well suited for applications where the computing headroom of 8-bit CPUs like the 8051 has finally topped out and designers need a compact CPU core that can accommodate current and future design requirements, while maintaining the silicon footprint and power profile of the CPU it’s replacing.”
Sunday, 5 July 2009
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