SAN JOSE, USA: Altera Corp has announced the interoperability of its Stratix IV GT FPGAs with 40G Quad Small Form-Factor Pluggable (QSFP) optical modules from Avago Technologies.
QSFP optical modules provide 40-Gbps data rates across a single link of fiber-optic cable. Leveraging the 11.3-Gbps embedded transceivers featured in Stratix IV GT FPGAs, designers can now take advantage of the flexibility and performance benefits of FPGAs to bridge 40G QSFP optical modules to other devices in their line cards and increase overall system bandwidth.
QSFP is the next-generation hot-pluggable interface for high-performance switches, routers, servers and host bus adapters used in computing and telecommunication applications.
The interface is currently the industry's most compact, 4-high-speed-channel, Z-axis pluggable interface supporting data rates up to 40 Gbps (4 lanes x 10 Gbps). The Stratix IV GT FPGA's 11.3-Gbps transceivers connect directly to the 40G QSFP optical module without the need of bridging chips.
“Stratix IV GT FPGAs provide an ideal solution to designers of high-performance networking and telecommunications systems who continue to push their system's bandwidth to new limits,” said Luanne Schirrmeister, senior director of component product marketing at Altera.
“The multiple 11.3-Gbps transceivers featured in Stratix IV GT FPGAs give designers the opportunity to connect eight QSFP optical modules to a single FPGA and transport up to 320 Gbps of aggregate data in their system. Obtaining this same level of performance using FPGAs with sub-10-Gbps transceivers requires the use of 32 SFP+ optical modules.”
Altera achieved interoperability with 40G QSFP optical modules by using a Stratix IV GT FPGA development board. The transmitter and receiver in the development board connected via SMA cables to two QSFP boards featuring 40G QSFP modules from Avago Technologies. The QSFP modules are connected by 30 meters of OM2 multimode optical fiber cable assembly. After more than 100 hours of operation, zero errors were observed, resulting in a bit error rate (BER) exceeding 10E-16.
Stratix IV GT FPGAs are currently shipping.
Wednesday, 31 March 2010
Synopsys' DesignWare SuperSpeed USB 3.0 IP receives USB-IF certification
MOUNTAIN VIEW, USA: Synopsys Inc. announced that its DesignWare SuperSpeed USB (USB 3.0) Solution including Controller and PHY IP successfully passed the USB Implementers Forum (USB-IF) SuperSpeed USB certification.
To achieve certification, the IP must pass protocol, electrical, and interoperability tests for SuperSpeed USB (USB 3.0, 5 Gbps) and Hi-Speed USB (USB 2.0, 480 Mbps). Synopsys created a fully integrated USB 3.0 IP solution, optimizing all speed modes into a single USB 3.0 solution.
This unique implementation enables designers to reduce area, pin count and power compared to separate USB 2.0 and SuperSpeed USB-only designs. Furthermore, the integrated DesignWare SuperSpeed USB IP significantly lowers integration risk and effort by not requiring designers to manage two distinct USB 2.0 and USB 3.0 data paths in their system-on-chips (SoCs). Synopsys will be showcasing its certified DesignWare SuperSpeed USB IP solution at the SuperSpeed USB Developer's Conference, Booth #18, in Taipei on April 1-2, 2010.
"Passing certification is important as it demonstrates that the IP meets USB-IF interoperability standards and is compliant to the USB 3.0 specification," said Jeff Ravencraft, president and chairman, USB-IF. "Certification of IP building blocks is an important step in the evolution of SuperSpeed USB technology, it assures designers that the solution interoperates with existing USB products while providing the speed and power benefits that SuperSpeed USB offers."
"As a leading provider of graphics over USB 2.0, it was critical that we select a trusted USB IP provider for the development of our next-generation high-definition over USB 3.0 platform," said Dennis Crespo, executive vice president of marketing, DisplayLink. "We chose Synopsys because of their established track record in delivering proven and compliant USB IP solutions which enables us to reduce the risk of incorporating a new interface into our design and quickly get our differentiated product to the market."
"For the past 15 years, Synopsys has been delivering high-quality USB IP solutions which have been integrated in more than 2000 designs," said John Koeter, vice president of marketing, Solutions Group at Synopsys.
"We leveraged our extensive experience in USB 2.0 and high-speed serial interfaces to develop our USB 3.0 IP solution that supports all four transfer speeds defined in the USB 3.0 specification. This gives designers a reliable and low-risk path to silicon-success for their USB 3.0 products."
The DesignWare SuperSpeed USB device controller and PHY IP is based on Synopsys' technology leading Hi-Speed USB products, which have been silicon-proven in thousands of designs and are shipping in volume production. Optimized for low power, the DesignWare SuperSpeed USB device controller is architected to allow designers to maximize battery life by using dual power rails.
The DesignWare SuperSpeed USB PHY consists of integrated high-speed digital and analog blocks, PLL and I/O pads, which are delivered as GDSII for advanced foundry processes. This saves designers considerable time, cost and the risk of acquiring and integrating the IP separately. The DesignWare SuperSpeed USB Verification IP has built-in support for the VMM methodology, enabling designers to quickly verify connectivity between integrated IP and the SoC.
The Linux drivers and SystemC transaction-level models in the DesignWare SuperSpeed USB virtual prototype allow designers to begin software development in parallel with IP integration, months before hardware and FPGA prototypes are ready. This significantly reduces the length of the product design cycle.
The DesignWare SuperSpeed USB Device, Hub, Host and Dual-Role Device Controllers, virtual prototype and driver IP are available now. The DesignWare SuperSpeed USB PHY IP is available in leading 65-nanometer (nm) and 130-nm process technologies now with support for 28-nm and 40-nm process technologies expected to be available in the second half of 2010.
To achieve certification, the IP must pass protocol, electrical, and interoperability tests for SuperSpeed USB (USB 3.0, 5 Gbps) and Hi-Speed USB (USB 2.0, 480 Mbps). Synopsys created a fully integrated USB 3.0 IP solution, optimizing all speed modes into a single USB 3.0 solution.
This unique implementation enables designers to reduce area, pin count and power compared to separate USB 2.0 and SuperSpeed USB-only designs. Furthermore, the integrated DesignWare SuperSpeed USB IP significantly lowers integration risk and effort by not requiring designers to manage two distinct USB 2.0 and USB 3.0 data paths in their system-on-chips (SoCs). Synopsys will be showcasing its certified DesignWare SuperSpeed USB IP solution at the SuperSpeed USB Developer's Conference, Booth #18, in Taipei on April 1-2, 2010.
"Passing certification is important as it demonstrates that the IP meets USB-IF interoperability standards and is compliant to the USB 3.0 specification," said Jeff Ravencraft, president and chairman, USB-IF. "Certification of IP building blocks is an important step in the evolution of SuperSpeed USB technology, it assures designers that the solution interoperates with existing USB products while providing the speed and power benefits that SuperSpeed USB offers."
"As a leading provider of graphics over USB 2.0, it was critical that we select a trusted USB IP provider for the development of our next-generation high-definition over USB 3.0 platform," said Dennis Crespo, executive vice president of marketing, DisplayLink. "We chose Synopsys because of their established track record in delivering proven and compliant USB IP solutions which enables us to reduce the risk of incorporating a new interface into our design and quickly get our differentiated product to the market."
"For the past 15 years, Synopsys has been delivering high-quality USB IP solutions which have been integrated in more than 2000 designs," said John Koeter, vice president of marketing, Solutions Group at Synopsys.
"We leveraged our extensive experience in USB 2.0 and high-speed serial interfaces to develop our USB 3.0 IP solution that supports all four transfer speeds defined in the USB 3.0 specification. This gives designers a reliable and low-risk path to silicon-success for their USB 3.0 products."
The DesignWare SuperSpeed USB device controller and PHY IP is based on Synopsys' technology leading Hi-Speed USB products, which have been silicon-proven in thousands of designs and are shipping in volume production. Optimized for low power, the DesignWare SuperSpeed USB device controller is architected to allow designers to maximize battery life by using dual power rails.
The DesignWare SuperSpeed USB PHY consists of integrated high-speed digital and analog blocks, PLL and I/O pads, which are delivered as GDSII for advanced foundry processes. This saves designers considerable time, cost and the risk of acquiring and integrating the IP separately. The DesignWare SuperSpeed USB Verification IP has built-in support for the VMM methodology, enabling designers to quickly verify connectivity between integrated IP and the SoC.
The Linux drivers and SystemC transaction-level models in the DesignWare SuperSpeed USB virtual prototype allow designers to begin software development in parallel with IP integration, months before hardware and FPGA prototypes are ready. This significantly reduces the length of the product design cycle.
The DesignWare SuperSpeed USB Device, Hub, Host and Dual-Role Device Controllers, virtual prototype and driver IP are available now. The DesignWare SuperSpeed USB PHY IP is available in leading 65-nanometer (nm) and 130-nm process technologies now with support for 28-nm and 40-nm process technologies expected to be available in the second half of 2010.
Optoelectronics, sensors and discretes to hit record sales in 2010
SCOTTSDALE, INDIA: After a horrific first quarter in 2009, semiconductor sales of optoelectronics and sensor devices staged dramatic turnarounds and finished the entire year with declines of just 5 percent and 2 percent, respectively, from record-high revenues recorded in 2008, according to IC Insights' newly completed 2010 Optoelectronics, Sensors, and Discretes (O-S-D) Report.
Recoveries in discrete semiconductors and actuator devices were also impressive in the final three quarters of last year, but those market segments still fell by 16 percent and 12 percent, respectively, in 2009.
Based on detailed market analysis in the new 300-page O-S-D Report, strong recovery momentum is expected to continue in 2010 with optoelectronics, sensors/actuators, and discretes markets all reaching new record-high revenues this year.
The 2010 O-S-D Report shows optoelectronics sales increasing 27 percent to $23.3 billion, sensor/actuator revenues climbing 33 percent to $6.8 billion, and discretes growing 29 percent to $19.7 billion this year. Within the sensors/actuators market segment, sales of devices made with microelectromechanical systems (MEMS) technology are forecast to grow 34 percent to $5.6 billion in 2010 after declining 5 percent in 2009 to $4.2 billion.
The dramatic turnaround in 2009 was mostly driven by replenishment of semiconductor inventories at systems manufacturers once their markets stabilized following the sharp falloff in product demand that occurred in the depth of the 2008-2009 economic recession. In practically all O-S-D product categories, sequential quarterly sales growth rebounded in 2Q09 by 20-40 percent from economically depressed levels in 1Q09.
Those increases continued through the rest of the year, turning 2009 into a modest setback for optoelectronics and the sensor/actuator markets. However, the discretes market segment—including power transistors—faced a greater uphill climb out of the early slump in 2009 and finished the year with a decline of 16 percent — its second worst drop in 25 years behind the 25 percent plunge suffered in the 2001 semiconductor recession. First-quarter sales slumps, overall 2009 performance, and the 2010 forecast for the O-S-D market segments are compared in Fig. 1.
In 2010, strong sales growth in optoelectronics, sensors/actuators, and discretes will be driven by the ongoing recovery in demand for portable electronics, consumer products, high-speed networks, notebook PCs, cellphones, industrial and medical equipment, and automotive systems, according to the latest edition of the annual O-S-D Report.
During the 2009-2014 forecast period, combined O-S-D sales are expected to increase at a CAGR of about 13 percent compared to the projected 12 percent CAGR for IC sales in the same five-year timeframe. Higher growth rates for MEMS-based accelerometers, gyroscope devices, actuators, pressure sensors, high-brightness LEDs, CMOS image sensors, and optical-network laser transmitters are expected to lift O-S-D sales by a greater annual percentage than overall IC sales in the next five years. The new report shows O-S-D revenues accounting for 17 percent of the projected $419 billion semiconductor total in 2014 compared to 16 percent of $238 billion in 2009.
Fig. 1
Source: IC Insights
Recoveries in discrete semiconductors and actuator devices were also impressive in the final three quarters of last year, but those market segments still fell by 16 percent and 12 percent, respectively, in 2009.
Based on detailed market analysis in the new 300-page O-S-D Report, strong recovery momentum is expected to continue in 2010 with optoelectronics, sensors/actuators, and discretes markets all reaching new record-high revenues this year.
The 2010 O-S-D Report shows optoelectronics sales increasing 27 percent to $23.3 billion, sensor/actuator revenues climbing 33 percent to $6.8 billion, and discretes growing 29 percent to $19.7 billion this year. Within the sensors/actuators market segment, sales of devices made with microelectromechanical systems (MEMS) technology are forecast to grow 34 percent to $5.6 billion in 2010 after declining 5 percent in 2009 to $4.2 billion.
The dramatic turnaround in 2009 was mostly driven by replenishment of semiconductor inventories at systems manufacturers once their markets stabilized following the sharp falloff in product demand that occurred in the depth of the 2008-2009 economic recession. In practically all O-S-D product categories, sequential quarterly sales growth rebounded in 2Q09 by 20-40 percent from economically depressed levels in 1Q09.
Those increases continued through the rest of the year, turning 2009 into a modest setback for optoelectronics and the sensor/actuator markets. However, the discretes market segment—including power transistors—faced a greater uphill climb out of the early slump in 2009 and finished the year with a decline of 16 percent — its second worst drop in 25 years behind the 25 percent plunge suffered in the 2001 semiconductor recession. First-quarter sales slumps, overall 2009 performance, and the 2010 forecast for the O-S-D market segments are compared in Fig. 1.
In 2010, strong sales growth in optoelectronics, sensors/actuators, and discretes will be driven by the ongoing recovery in demand for portable electronics, consumer products, high-speed networks, notebook PCs, cellphones, industrial and medical equipment, and automotive systems, according to the latest edition of the annual O-S-D Report.
During the 2009-2014 forecast period, combined O-S-D sales are expected to increase at a CAGR of about 13 percent compared to the projected 12 percent CAGR for IC sales in the same five-year timeframe. Higher growth rates for MEMS-based accelerometers, gyroscope devices, actuators, pressure sensors, high-brightness LEDs, CMOS image sensors, and optical-network laser transmitters are expected to lift O-S-D sales by a greater annual percentage than overall IC sales in the next five years. The new report shows O-S-D revenues accounting for 17 percent of the projected $419 billion semiconductor total in 2014 compared to 16 percent of $238 billion in 2009.
Fig. 1
Source: IC Insights
Does India’s semiconductor policy need an extension?
MUMBAI, INDIA: India's progression up the value chain in the Electronics and Semiconductors industry depends to a large extent on the development of an industry favourable ecosystem in the country. The Indian Semiconductor Policy of 2007 was precisely structured to aid this cause.
Organizations such as the India Semiconductor Association (ISA) have worked with the Government to initiate favourable policies to encourage investments in semiconductor manufacturing. Thus, was born the ‘Semiconductor Policy’ of the Government of India in 2007, aimed at improving the country’s semiconductor ecosystem in a structured and planned manner.
After being in operation for the past three years, this policy is due to expire on 31st March, 2010. During this period, proposals for investment have been submitted under the policy; however, the key objective of the policy is yet to be completely realized. The global economic downturn of 2008-09 resulted in declining demand from electronics OEMs, forcing semiconductor companies to curtail production and defer investment decisions. This economic scenario adversely impacted the success of the semiconductor policy.
Need for the semiconductor policy
With India's electronics industry growing at a gargantuan rate, the need for policies and incentives becomes significantly crucial. While the growth rate of electronic products in advanced geographies is stagnating, the demand in India is witnessing exponential growth.
A recent task force report, recognized by the Department of Information Technology (DIT), Government of India, highlights that the domestic consumption for electronics is likely to reach $400 billion by 2020 and that to meet this demand local electronics production needs to be scaled up to $320 billion. This massive growth in local electronics production is expected to amplify the demand for semiconductors thus triggering the need for local chip fabrication.
The cost to set-up a fab is a key factor in determining the financial feasibility of the project. In 2005, when SemIndia Inc proposed to set-up a fab, the estimated investment was $3 billion, which doubled to nearly $7 billion by 2008.
The drivers for the cost of fabs are increased wafer diameters, increased complexity of process due to shrinking line-widths, and output volume capacity on a monthly basis. The capital expenditure for setting up a chip fabrication plant has increased while the price per chip has declined over the years. Further, despite the high level of automation in fabrication units, chip manufacturing does require its share of skilled labour. Yet another critical requirement for setting up a fab is the presence of world class infrastructure facilities.
Currently, India has the intellectual potential in terms of skilled workforce. The semiconductor design industry in the country is mature with a strong IP policy. Though the country’s infrastructure needs a lot of improvement, periodic initiatives have been taken to raise the level of infrastructure in the country.
Even in the recent budget announcement for fiscal 2010-11, the Government has provided INR 1,735.52 billion for accelerating the development of high quality infrastructure such as roads, railways and ports. Further, the Government has more than doubled its plan allocation to the power sector to INR 51.3 billion compared to the previous fiscal year.
From all the above factors, it is evident that the presence of an exclusive policy that alleviates, to a certain extent, the financial burden involved in setting up a fab apart from offering other incentives, is the right initiative for promoting chip production in the country.
Semiconductor policy and current status
In February 2007, the Government of India announced the much awaited Semiconductor Policy for India. The policy included an incentive package for the manufacturing of semiconductors, displays including Liquid Crystal Displays (LCDs), Organic Light Emitting Diodes (OLEDs), Plasma Display Panels (PDPs) and any other emerging displays, storage devices, solar cells, photo voltaics, other advanced micro and nanotechnology products, and assembly and test. Under the policy, projects have been classified under two categories, Fab unit and Ecosystem unit.
Fig. 1-1 gives a summary of the semiconductor policy of India introduced in 2007.
Source: Frost & Sullivan
Since the announcement of the policy, 18 companies have submitted proposals with a total investment of INR 1.48 trillion under the policy. Out of the proposals submitted one is for an LCD project by Videocon and one for a semiconductor chip project by Reliance Industries Ltd. The remaining proposals are for solar PV manufacturing.
The initial expectation was for two to three fabs and around 10 ecosystem units, but currently there are not enough proposals for fabs. The Department of Information Technology, DIT gave in-principle approval to 12 companies in June 2009, but the final sanctions for the proposals are expected to come when the appraisal committee completes evaluating the proposals based on the financial closures of the companies submitted. The committed investment from these 12 projects is approximately INR 70,000 crore.
Recommendations
Solar PV manufacturing
Major investments for solar PV under the semiconductor policy are for solar cell and module production. Major proportion of the value-adding activity occurs outside the country. In the short-term it is a good start to see the investment in the solar PV sector but in the medium-term the Government should address the two issues of backward integration and providing incentives to medium-scale enterprises. Demand stimulating policies such as the National Solar mission have come at the right time.
Incentives and policies to encourage domestic electronics production
Incentives provided by other Asian countries are more attractive compared to India. To encourage domestic production, rationalization of import duty on electronic goods, tax subsidies and easy access to finance among others should receive priority.
Fig. 1-2 succinctly compares the support provided by India versus China and Taiwan for electronics and semiconductor manufacturing.
Source: Frost & Sullivan
Apart from tax subsidies, customs duty on essential raw materials for electronic products manufacturing needs to be significantly lowered to facilitate local manufacturing.
Marketing of the policy
The Semiconductor Policy needs more marketing muscle. The salient features of the scheme need to be promoted far and wide. The Government must partner with associations such as the ISA, CII, and so on to take the benefits of the scheme across shores to major electronic hotbeds such as Taiwan, the US, China, Japan, Singapore, and European majors so as to educate companies globally of the existence and benefits of the policy and thereby, attract investments into the country.
More state policies
Apart from Karnataka that recently announced a state semiconductor policy, none of the other state governments have been pro-active in coming up with their own additional incentive schemes that boost investment in the semiconductor industry. If more states initiate such policies, there is likely to be more interest and participation from across the semiconductor value chain for investments to pour in.
Extension of the policy to design houses
The primary motive of the semiconductor policy in its current form, has been to promote investments in chip fabrication in the country.
Whilst this is very desirable, it might be worthwhile to extend the policy to design houses so as to further encourage and strengthen the design industry: since India has established its dominance in design,. Further, emphasis can be made through the policy to encourage design-led-fabrication. This can be done by mandating that design houses that avail of the policy incentives need to partner with independent fabs or electronics manufacturing services (EMS) companies to locally fabricate the chips that they design.
Final verdict on the semiconductor policy
Having analyzed the merits, requirements and performance of the semiconductor policy, it is seen that the government should continue with the semiconductor policy until 2012 or better still up to 2015 to develop this industry and tap evolving growth opportunities.
Organizations such as the India Semiconductor Association (ISA) have worked with the Government to initiate favourable policies to encourage investments in semiconductor manufacturing. Thus, was born the ‘Semiconductor Policy’ of the Government of India in 2007, aimed at improving the country’s semiconductor ecosystem in a structured and planned manner.
After being in operation for the past three years, this policy is due to expire on 31st March, 2010. During this period, proposals for investment have been submitted under the policy; however, the key objective of the policy is yet to be completely realized. The global economic downturn of 2008-09 resulted in declining demand from electronics OEMs, forcing semiconductor companies to curtail production and defer investment decisions. This economic scenario adversely impacted the success of the semiconductor policy.
Need for the semiconductor policy
With India's electronics industry growing at a gargantuan rate, the need for policies and incentives becomes significantly crucial. While the growth rate of electronic products in advanced geographies is stagnating, the demand in India is witnessing exponential growth.
A recent task force report, recognized by the Department of Information Technology (DIT), Government of India, highlights that the domestic consumption for electronics is likely to reach $400 billion by 2020 and that to meet this demand local electronics production needs to be scaled up to $320 billion. This massive growth in local electronics production is expected to amplify the demand for semiconductors thus triggering the need for local chip fabrication.
The cost to set-up a fab is a key factor in determining the financial feasibility of the project. In 2005, when SemIndia Inc proposed to set-up a fab, the estimated investment was $3 billion, which doubled to nearly $7 billion by 2008.
The drivers for the cost of fabs are increased wafer diameters, increased complexity of process due to shrinking line-widths, and output volume capacity on a monthly basis. The capital expenditure for setting up a chip fabrication plant has increased while the price per chip has declined over the years. Further, despite the high level of automation in fabrication units, chip manufacturing does require its share of skilled labour. Yet another critical requirement for setting up a fab is the presence of world class infrastructure facilities.
Currently, India has the intellectual potential in terms of skilled workforce. The semiconductor design industry in the country is mature with a strong IP policy. Though the country’s infrastructure needs a lot of improvement, periodic initiatives have been taken to raise the level of infrastructure in the country.
Even in the recent budget announcement for fiscal 2010-11, the Government has provided INR 1,735.52 billion for accelerating the development of high quality infrastructure such as roads, railways and ports. Further, the Government has more than doubled its plan allocation to the power sector to INR 51.3 billion compared to the previous fiscal year.
From all the above factors, it is evident that the presence of an exclusive policy that alleviates, to a certain extent, the financial burden involved in setting up a fab apart from offering other incentives, is the right initiative for promoting chip production in the country.
Semiconductor policy and current status
In February 2007, the Government of India announced the much awaited Semiconductor Policy for India. The policy included an incentive package for the manufacturing of semiconductors, displays including Liquid Crystal Displays (LCDs), Organic Light Emitting Diodes (OLEDs), Plasma Display Panels (PDPs) and any other emerging displays, storage devices, solar cells, photo voltaics, other advanced micro and nanotechnology products, and assembly and test. Under the policy, projects have been classified under two categories, Fab unit and Ecosystem unit.
Fig. 1-1 gives a summary of the semiconductor policy of India introduced in 2007.
Source: Frost & SullivanSince the announcement of the policy, 18 companies have submitted proposals with a total investment of INR 1.48 trillion under the policy. Out of the proposals submitted one is for an LCD project by Videocon and one for a semiconductor chip project by Reliance Industries Ltd. The remaining proposals are for solar PV manufacturing.
The initial expectation was for two to three fabs and around 10 ecosystem units, but currently there are not enough proposals for fabs. The Department of Information Technology, DIT gave in-principle approval to 12 companies in June 2009, but the final sanctions for the proposals are expected to come when the appraisal committee completes evaluating the proposals based on the financial closures of the companies submitted. The committed investment from these 12 projects is approximately INR 70,000 crore.
Recommendations
Solar PV manufacturing
Major investments for solar PV under the semiconductor policy are for solar cell and module production. Major proportion of the value-adding activity occurs outside the country. In the short-term it is a good start to see the investment in the solar PV sector but in the medium-term the Government should address the two issues of backward integration and providing incentives to medium-scale enterprises. Demand stimulating policies such as the National Solar mission have come at the right time.
Incentives and policies to encourage domestic electronics production
Incentives provided by other Asian countries are more attractive compared to India. To encourage domestic production, rationalization of import duty on electronic goods, tax subsidies and easy access to finance among others should receive priority.
Fig. 1-2 succinctly compares the support provided by India versus China and Taiwan for electronics and semiconductor manufacturing.
Source: Frost & SullivanApart from tax subsidies, customs duty on essential raw materials for electronic products manufacturing needs to be significantly lowered to facilitate local manufacturing.
Marketing of the policy
The Semiconductor Policy needs more marketing muscle. The salient features of the scheme need to be promoted far and wide. The Government must partner with associations such as the ISA, CII, and so on to take the benefits of the scheme across shores to major electronic hotbeds such as Taiwan, the US, China, Japan, Singapore, and European majors so as to educate companies globally of the existence and benefits of the policy and thereby, attract investments into the country.
More state policies
Apart from Karnataka that recently announced a state semiconductor policy, none of the other state governments have been pro-active in coming up with their own additional incentive schemes that boost investment in the semiconductor industry. If more states initiate such policies, there is likely to be more interest and participation from across the semiconductor value chain for investments to pour in.
Extension of the policy to design houses
The primary motive of the semiconductor policy in its current form, has been to promote investments in chip fabrication in the country.
Whilst this is very desirable, it might be worthwhile to extend the policy to design houses so as to further encourage and strengthen the design industry: since India has established its dominance in design,. Further, emphasis can be made through the policy to encourage design-led-fabrication. This can be done by mandating that design houses that avail of the policy incentives need to partner with independent fabs or electronics manufacturing services (EMS) companies to locally fabricate the chips that they design.
Final verdict on the semiconductor policy
Having analyzed the merits, requirements and performance of the semiconductor policy, it is seen that the government should continue with the semiconductor policy until 2012 or better still up to 2015 to develop this industry and tap evolving growth opportunities.
KLA-Tencor announces adoption of Candela CS20 platform by leading Korean LED device maker
MILPITAS, USA: KLA-Tencor Corp., the world's leading supplier of process control and yield management solutions for the semiconductor and related industries, announced that Korean company, Seoul Optodevice Co. Ltd, has become the latest LED device maker to adopt KLA-Tencor's Candela CS20 platform.
This significant sale marks the growing importance of defect inspection for the Metal Organic Chemical Vapor Deposition (MOCVD) process, and reinforces KLA-Tencor's continued focus on LED inspection.
Defects from epi and substrate processes can impact yield and field reliability. Critical epi defects include: pits, cracks, topographic anomalies, and surface non-uniformity, while substrate defects can include: particles, scratches and stains.
KLA-Tencor's Candela CS20 system is uniquely designed for the inspection of transparent materials—gallium nitride and sapphire—with simultaneous detection of surface reflectivity, topography, scatter and phase signatures. This automated inspection system, with real-time classification, provides actionable data for effective process control.
Commenting on the tool capability, Seoul Optodevice stated: "Inspection results from the Candela CS20 will enable us to optimize epi processes and improve productivity. Adoption of this advanced process control strategy will enhance the value to our customers through improved product quality and consistent performance. These benefits align directly with our goal to maintain leadership in this rapidly emerging market."
Jeff Donnelly, group vice president of the Growth and Emerging Markets division of KLA-Tencor, stated: "LED market growth is slated to be greater than 35 percent year-over-year. We are making significant investments in products that specifically address LED manufacturing needs. This investment, combined with our extensive experience in process control solutions, enables us to bring superior products to market rapidly to address the industry's cost and technology roadmaps."
The Candela CS20 is currently installed in multiple fabs around the world.
This significant sale marks the growing importance of defect inspection for the Metal Organic Chemical Vapor Deposition (MOCVD) process, and reinforces KLA-Tencor's continued focus on LED inspection.
Defects from epi and substrate processes can impact yield and field reliability. Critical epi defects include: pits, cracks, topographic anomalies, and surface non-uniformity, while substrate defects can include: particles, scratches and stains.
KLA-Tencor's Candela CS20 system is uniquely designed for the inspection of transparent materials—gallium nitride and sapphire—with simultaneous detection of surface reflectivity, topography, scatter and phase signatures. This automated inspection system, with real-time classification, provides actionable data for effective process control.
Commenting on the tool capability, Seoul Optodevice stated: "Inspection results from the Candela CS20 will enable us to optimize epi processes and improve productivity. Adoption of this advanced process control strategy will enhance the value to our customers through improved product quality and consistent performance. These benefits align directly with our goal to maintain leadership in this rapidly emerging market."
Jeff Donnelly, group vice president of the Growth and Emerging Markets division of KLA-Tencor, stated: "LED market growth is slated to be greater than 35 percent year-over-year. We are making significant investments in products that specifically address LED manufacturing needs. This investment, combined with our extensive experience in process control solutions, enables us to bring superior products to market rapidly to address the industry's cost and technology roadmaps."
The Candela CS20 is currently installed in multiple fabs around the world.
Supermicro delivers 8-core Xeon MP SuperServers
SAN JOSE, USA: Super Micro Computer, Inc. (Nasdaq: SMCI), a leader in application-optimized, high-performance server solutions, has announced availability of the industry's first line of 8-core, 4-way Xeon servers.
Supermicro's 8016B-6F, 8016B-TF, 8026B-6RF, 8026B-TRF, 8046B-6RF and 8046B-TRF SuperServers optimized for the 8-Core Intel® Xeon® processor 7500 series feature up to 256GB memory, incredible 93%+ energy efficiency, and robust enterprise virtualization performance.
"With Supermicro's industry-leading, 93%+ high-efficiency Server Building Block Solutions, we are able to deliver exceptional value to customers looking for consolidation and virtualization," asserts Charles Liang, president and CEO of Supermicro.
"Our 1U, 2U and 4U SuperServers optimized for the new Intel Xeon 7500 (Nehalem EX) processors provide compelling solutions for the dense rack segment. These servers can significantly boost both virtualization and overall performance compared to the previous generations having the same power envelope."
"The Intel Xeon Processor 7500 series is delivering unprecedented new levels of performance and platform scalability," said Kirk Skaugen, Vice President and General Manager of Intel's Data Center Group. "Supermicro's SuperServer line takes advantage of these new capabilities and offers customers 4-way server solutions well-suited for a variety of demanding enterprise and high performance computing applications."
Based on Supermicro's X8QB6-F and X8QBE-F serverboards, the 8016B-6F/TF, 8026B-6RF/TRF, 8046B-6RF and 8046B-TRF SuperServers all support up to 256GB of registered ECC DDR3 memory via 32 DIMM slots. Great for virtualization, this large memory capacity boosts performance for a wide range of applications.
Leveraging Supermicro's superior engineering and server design technology, the SuperServer 8016B-6F is an extremely high-density solution particularly optimized for high performance computing cluster (HPCC) applications.
With 93 percent+ Gold-level power supply efficiency and optimal cooling designs, these energy-efficient servers deliver breakthrough performance-per-watt. The performance boosting features of Supermicro's new 4-way systems also include up to four PCI-E Gen 2.0 slots, 90 percent+ power efficient VRMs, and onboard 6Gb/s SAS (SAS 2.0) controller with hardware RAID 0, 1, 5, 6, 10 and 60 support comes standard on the 8016B-6F, 8026B-6RF and 8046B-6RF servers. These new platforms also offer onboard IPMI 2.0 with media and KVM-over-LAN support for optimal remote management.
Supermicro offers 4-way SuperServers that support the full range of Xeon 7500 processor SKUs. From performance optimized 130-watt to high-density rack-optimized 95-watt SKUs, customers now have many choices to select the server that is best for their requirements.
Supermicro's 8016B-6F, 8016B-TF, 8026B-6RF, 8026B-TRF, 8046B-6RF and 8046B-TRF SuperServers optimized for the 8-Core Intel® Xeon® processor 7500 series feature up to 256GB memory, incredible 93%+ energy efficiency, and robust enterprise virtualization performance.
"With Supermicro's industry-leading, 93%+ high-efficiency Server Building Block Solutions, we are able to deliver exceptional value to customers looking for consolidation and virtualization," asserts Charles Liang, president and CEO of Supermicro.
"Our 1U, 2U and 4U SuperServers optimized for the new Intel Xeon 7500 (Nehalem EX) processors provide compelling solutions for the dense rack segment. These servers can significantly boost both virtualization and overall performance compared to the previous generations having the same power envelope."
"The Intel Xeon Processor 7500 series is delivering unprecedented new levels of performance and platform scalability," said Kirk Skaugen, Vice President and General Manager of Intel's Data Center Group. "Supermicro's SuperServer line takes advantage of these new capabilities and offers customers 4-way server solutions well-suited for a variety of demanding enterprise and high performance computing applications."
Based on Supermicro's X8QB6-F and X8QBE-F serverboards, the 8016B-6F/TF, 8026B-6RF/TRF, 8046B-6RF and 8046B-TRF SuperServers all support up to 256GB of registered ECC DDR3 memory via 32 DIMM slots. Great for virtualization, this large memory capacity boosts performance for a wide range of applications.
Leveraging Supermicro's superior engineering and server design technology, the SuperServer 8016B-6F is an extremely high-density solution particularly optimized for high performance computing cluster (HPCC) applications.
With 93 percent+ Gold-level power supply efficiency and optimal cooling designs, these energy-efficient servers deliver breakthrough performance-per-watt. The performance boosting features of Supermicro's new 4-way systems also include up to four PCI-E Gen 2.0 slots, 90 percent+ power efficient VRMs, and onboard 6Gb/s SAS (SAS 2.0) controller with hardware RAID 0, 1, 5, 6, 10 and 60 support comes standard on the 8016B-6F, 8026B-6RF and 8046B-6RF servers. These new platforms also offer onboard IPMI 2.0 with media and KVM-over-LAN support for optimal remote management.
Supermicro offers 4-way SuperServers that support the full range of Xeon 7500 processor SKUs. From performance optimized 130-watt to high-density rack-optimized 95-watt SKUs, customers now have many choices to select the server that is best for their requirements.
Nemotek selects EV Group wafer bonding and UV nanoimprint lithography systems for capacity ramp
ST. FLORIAN, AUSTRIA: EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, announced that Morocco-based wafer-level camera manufacturer Nemotek Technologie has placed a repeat order for EVG's bonding and UV nanoimprint lithography (UV-NIL) systems – the EVG520IS and IQ Aligner.
Nemotek will use these systems to address its production demands for CMOS image sensors and wafer-level optics that will be deployed in wafer-level cameras for mobile applications. This order marks a significant win for EVG as it paves the way for a long-term partnership with Nemotek – and further bolsters EVG's dominant position as the preferred bonding and UV-NIL equipment provider for wafer-level camera applications.
As the size of the camera in mobile phones can be a limiting factor in mobile handset designs, there is an increasing demand for smaller camera modules that can still address the call for higher resolution and cost effectiveness. This has shifted manufacturing of both the CMOS image sensor and the micro-optics stack to the wafer level, which in turn has created new manufacturing challenges. Manufacturing these devices at the wafer level requires precision alignment and effective bonding in multiple layers of the optical stack in order to reach maximum device performance.
Known for its ability to align wafers with extremely high accuracy, EVG's IQ Aligner is the only industry-proven, high-volume manufacturing solution for wafer lens molding and stacking available today.
"Demand continues to rise for wafer-level cameras, and we are ramping up our production capabilities in order to meet our customers' needs," said Jacky Perdrigeat, CEO of Nemotek Technologie. "To support our production expansion efforts, we selected EV Group's wafer bonding and UV-NIL systems not only for their high-volume capabilities, but also for their support of our preferred wafer-level technology process. The quality of the technical results and the repeatability that we have witnessed in using the existing EVG systems in our state-of-the-art cleanroom also weighed heavily in our selection process."
Paul Lindner, executive technology director of EV Group, noted: "This opportunity to further support Nemotek's capacity needs is testament to the strength of our wafer-level solutions portfolio, which features field-proven, high-volume capabilities. It also validates our success in parlaying our long-time expertise in the manufacture of CMOS image sensors to handle the shift to wafer-level production for the overall optics market.
"We value the confidence Nemotek has placed in our wafer bonding, UV-NIL lens molding and aligned UV bonding technologies for their wafer-level camera applications, and look forward to opportunities to not only expand our relationship, but also forge collaborative ties in support of Nemotek's growth."
The EVG systems augment Nemotek's class 10 cleanroom, which already houses several EVG tools, including an EVG6200 bond aligner, a fully automated IQ Aligner UV-NIL system, an EVG520IS wafer bonder, and an EVG40NT metrology system. The two new tools will be installed in phases with the two-bond chamber EVG520IS for CMOS image sensor manufacturing, to be completed this month. The second IQ Aligner UV-NIL system for micro-lens molding, bond alignment and UV bonding of micro-optics stacks will be installed later this year.
The wafer-level camera equipment market represents another high-growth segment in which EVG has successfully established its technology process and expertise. Its dominant position in this market contributed to EVG's financial success in 2009, when the company continued to see an increase in both order intake and revenue despite the global economic recession.
Nemotek will use these systems to address its production demands for CMOS image sensors and wafer-level optics that will be deployed in wafer-level cameras for mobile applications. This order marks a significant win for EVG as it paves the way for a long-term partnership with Nemotek – and further bolsters EVG's dominant position as the preferred bonding and UV-NIL equipment provider for wafer-level camera applications.
As the size of the camera in mobile phones can be a limiting factor in mobile handset designs, there is an increasing demand for smaller camera modules that can still address the call for higher resolution and cost effectiveness. This has shifted manufacturing of both the CMOS image sensor and the micro-optics stack to the wafer level, which in turn has created new manufacturing challenges. Manufacturing these devices at the wafer level requires precision alignment and effective bonding in multiple layers of the optical stack in order to reach maximum device performance.
Known for its ability to align wafers with extremely high accuracy, EVG's IQ Aligner is the only industry-proven, high-volume manufacturing solution for wafer lens molding and stacking available today.
"Demand continues to rise for wafer-level cameras, and we are ramping up our production capabilities in order to meet our customers' needs," said Jacky Perdrigeat, CEO of Nemotek Technologie. "To support our production expansion efforts, we selected EV Group's wafer bonding and UV-NIL systems not only for their high-volume capabilities, but also for their support of our preferred wafer-level technology process. The quality of the technical results and the repeatability that we have witnessed in using the existing EVG systems in our state-of-the-art cleanroom also weighed heavily in our selection process."
Paul Lindner, executive technology director of EV Group, noted: "This opportunity to further support Nemotek's capacity needs is testament to the strength of our wafer-level solutions portfolio, which features field-proven, high-volume capabilities. It also validates our success in parlaying our long-time expertise in the manufacture of CMOS image sensors to handle the shift to wafer-level production for the overall optics market.
"We value the confidence Nemotek has placed in our wafer bonding, UV-NIL lens molding and aligned UV bonding technologies for their wafer-level camera applications, and look forward to opportunities to not only expand our relationship, but also forge collaborative ties in support of Nemotek's growth."
The EVG systems augment Nemotek's class 10 cleanroom, which already houses several EVG tools, including an EVG6200 bond aligner, a fully automated IQ Aligner UV-NIL system, an EVG520IS wafer bonder, and an EVG40NT metrology system. The two new tools will be installed in phases with the two-bond chamber EVG520IS for CMOS image sensor manufacturing, to be completed this month. The second IQ Aligner UV-NIL system for micro-lens molding, bond alignment and UV bonding of micro-optics stacks will be installed later this year.
The wafer-level camera equipment market represents another high-growth segment in which EVG has successfully established its technology process and expertise. Its dominant position in this market contributed to EVG's financial success in 2009, when the company continued to see an increase in both order intake and revenue despite the global economic recession.
ST demos complete system solution for laser printers
GENEVA, SWITZERLAND: STMicroelectronics has unveiled a complete system solution for laser-printer applications, based on the company's SPEAr embedded microprocessor technology.
The working-prototype formatter board comprises all hardware, firmware and software components, reducing development time and required resources for printer manufacturers.
ST's laser-printer controller board integrates the high-performance SPEAr600 device with two ARM9 cores, connectivity peripherals — DDR2 memory, USB 2.0, Giga Ethernet — and an FPGA. This is complemented with laser-printer specific IPs, firmware subsystems and a simplified user interface based on the Windows Software Development Kit.
The application-specific features include a laser video output and LVDS (Low Voltage Differential Signaling) buffers that directly drive the four-color laser beams, four direct memory-access channels for data management, and a serial interface that sends commands and receives status information from the laser engines.
Tested and benchmarked with best-in-class printers, ST's prototype board provides a complete system solution aimed at a wide application range, from entry-level single-function laser printers to mid-range and high-end multi-function models. Cutting costs, time-to-market and system know-how requirements, the ready-to-implement solution enables laser-printer manufacturers to build high-quality products with minimum development efforts.
Manufactured in state-of-the-art low-power 90nm and 65nm HCMOS (high-speed CMOS) process technologies, ST's SPEAr (Structured Processor Enhanced Architecture) embedded microprocessors provide high levels of computing power and connectivity, targeting embedded-control applications across market segments from computer peripherals and communication to industrial automation.
Based on the latest ARM core technology, the SPEAr devices enable equipment manufacturers to develop complex yet flexible digital engines at a fraction of the time and cost required by a full-custom design approach.
The working-prototype formatter board comprises all hardware, firmware and software components, reducing development time and required resources for printer manufacturers.
ST's laser-printer controller board integrates the high-performance SPEAr600 device with two ARM9 cores, connectivity peripherals — DDR2 memory, USB 2.0, Giga Ethernet — and an FPGA. This is complemented with laser-printer specific IPs, firmware subsystems and a simplified user interface based on the Windows Software Development Kit.
The application-specific features include a laser video output and LVDS (Low Voltage Differential Signaling) buffers that directly drive the four-color laser beams, four direct memory-access channels for data management, and a serial interface that sends commands and receives status information from the laser engines.
Tested and benchmarked with best-in-class printers, ST's prototype board provides a complete system solution aimed at a wide application range, from entry-level single-function laser printers to mid-range and high-end multi-function models. Cutting costs, time-to-market and system know-how requirements, the ready-to-implement solution enables laser-printer manufacturers to build high-quality products with minimum development efforts.
Manufactured in state-of-the-art low-power 90nm and 65nm HCMOS (high-speed CMOS) process technologies, ST's SPEAr (Structured Processor Enhanced Architecture) embedded microprocessors provide high levels of computing power and connectivity, targeting embedded-control applications across market segments from computer peripherals and communication to industrial automation.
Based on the latest ARM core technology, the SPEAr devices enable equipment manufacturers to develop complex yet flexible digital engines at a fraction of the time and cost required by a full-custom design approach.
WiSpry signs Takachiho Koheki as technical distributor for Japan
IRVINE, USA: WiSpry Inc., a leader in tunable RF semiconductor products for the wireless industry, announced the addition of Takachiho Koheki Co. Ltd (TK) as its technical distributor for Japan.
TK is one of Japan's leading distributors of electronics components to consumer electronics manufacturers and mobile phone makers. With over 50 years of experience in bringing Western technology to the Japanese market, TK gives companies the vital support necessary to make their products a success.
"We will be able to provide important Japanese customers, such as mobile phone makers and module makers of wireless communications, greater value by offering new solutions featuring WiSpry's products with advanced tunable RF technology," said Hideo Toda, president of TK. "WiSpry's product portfolio and roadmap are central and are strategically important to our mobile business segment and we plan to build a solid partnership with them."
"We spent a great deal of time determining what channel partner would be the best fit for WiSpry," said Lew Boore, WiSpry's vice president of Marketing & Sales. "TK's unique combination of market knowledge, customer focus and technical know-how makes them a vital partner for us in Japan. They are key in providing our customers with the local technical and logistical support they require."
TK is one of Japan's leading distributors of electronics components to consumer electronics manufacturers and mobile phone makers. With over 50 years of experience in bringing Western technology to the Japanese market, TK gives companies the vital support necessary to make their products a success.
"We will be able to provide important Japanese customers, such as mobile phone makers and module makers of wireless communications, greater value by offering new solutions featuring WiSpry's products with advanced tunable RF technology," said Hideo Toda, president of TK. "WiSpry's product portfolio and roadmap are central and are strategically important to our mobile business segment and we plan to build a solid partnership with them."
"We spent a great deal of time determining what channel partner would be the best fit for WiSpry," said Lew Boore, WiSpry's vice president of Marketing & Sales. "TK's unique combination of market knowledge, customer focus and technical know-how makes them a vital partner for us in Japan. They are key in providing our customers with the local technical and logistical support they require."
Helium-ion microscopy fires imagination of researchers in US and Japan
PEABODY, USA: The Pacific Northwest National Laboratory (PNNL), located in Richland, Washington, is bringing an ORION PLUS instrument into the US Department of Energy’s Environmental Molecular Sciences Laboratory as a resource.
And, in Tsukuba, Japan, the National Institute of Advanced Industrial Science and Technology (AIST) has selected an ORION PLUS for their new Nanodevice Innovation Research Center. These installations provide further evidence of a growing reliance on helium-ion microscopy for the most demanding research in materials, life science and semiconductor applications.
PNNL has become the first US national lab to acquire a ZEISS ORION PLUS helium-ion microscope. One of the Department of Energy's (DOE's) ten national laboratories, managed by DOE's Office of Science, PNNL offers an open, collaborative environment for scientific discovery to researchers around the world.
“We are very excited to be adding a helium-ion microscope to our arsenal of leading-edge scientific instruments,” said Shuttha Shutthanadan, scientist at the Environmental Molecular Sciences Laboratory (EMSL), a national scientific user facility located at PNNL. “Basically, helium-ion microscopy improves our vision at the nanoscale, allowing us to see things we could never see before. Having access to an instrument that provides world-record spatial resolution imaging, plus high image contrast and large depth of field will enable our users to accelerate their innovations.”
Weilin Jiang, EMSL scientist, adds: “Perhaps one of the greatest advantages of helium-ion microscopy is the ability to clearly image uncoated insulating materials.” This circumvents the time consuming, resolution diminishing practice of coating a sample to deal with its charging. The tool is scheduled for delivery at the end of March of this year.
At the prestigious AIST in Tsukuba, Japan, formal acceptance of their new ORION PLUS microscope was completed on February eighth of this year. The AIST system is outfitted with all of the available options, including the recently developed Spectra Detector. A newly designed Gas Injection System will be added shortly.
“Installation and acceptance were completed rapidly and without any major issues, including a dramatic trip by crane to a fourth floor balcony of the AIST building,” reports David Voci, Carl Zeiss SMT’s director of business development for the ORION product. AIST will use the tool in support of their research into next generation semiconductor technology, as well as for clean energy applications.
Research topics identified include Low K dielectrics, EUV photomask metrology, nano-imprint lithography, carbon nanotube and graphene device research, as well as applications in support of solar and fuel cell research. The instrument is situated in a user facility that eventually will be available to all AIST researchers for a broad range of uses from semiconductor to life science applications.
“The AIST system was the first ORION PLUS microscope delivered that was designed and built to achieve the 0.35nm probe size specification. The EMSL ORION PLUS instrument is the second tool of this generation, and we are confident that our production and field service team will accomplish this installation equally well as with the AIST system,” comments Voci.
And, in Tsukuba, Japan, the National Institute of Advanced Industrial Science and Technology (AIST) has selected an ORION PLUS for their new Nanodevice Innovation Research Center. These installations provide further evidence of a growing reliance on helium-ion microscopy for the most demanding research in materials, life science and semiconductor applications.
PNNL has become the first US national lab to acquire a ZEISS ORION PLUS helium-ion microscope. One of the Department of Energy's (DOE's) ten national laboratories, managed by DOE's Office of Science, PNNL offers an open, collaborative environment for scientific discovery to researchers around the world.
“We are very excited to be adding a helium-ion microscope to our arsenal of leading-edge scientific instruments,” said Shuttha Shutthanadan, scientist at the Environmental Molecular Sciences Laboratory (EMSL), a national scientific user facility located at PNNL. “Basically, helium-ion microscopy improves our vision at the nanoscale, allowing us to see things we could never see before. Having access to an instrument that provides world-record spatial resolution imaging, plus high image contrast and large depth of field will enable our users to accelerate their innovations.”
Weilin Jiang, EMSL scientist, adds: “Perhaps one of the greatest advantages of helium-ion microscopy is the ability to clearly image uncoated insulating materials.” This circumvents the time consuming, resolution diminishing practice of coating a sample to deal with its charging. The tool is scheduled for delivery at the end of March of this year.
At the prestigious AIST in Tsukuba, Japan, formal acceptance of their new ORION PLUS microscope was completed on February eighth of this year. The AIST system is outfitted with all of the available options, including the recently developed Spectra Detector. A newly designed Gas Injection System will be added shortly.
“Installation and acceptance were completed rapidly and without any major issues, including a dramatic trip by crane to a fourth floor balcony of the AIST building,” reports David Voci, Carl Zeiss SMT’s director of business development for the ORION product. AIST will use the tool in support of their research into next generation semiconductor technology, as well as for clean energy applications.
Research topics identified include Low K dielectrics, EUV photomask metrology, nano-imprint lithography, carbon nanotube and graphene device research, as well as applications in support of solar and fuel cell research. The instrument is situated in a user facility that eventually will be available to all AIST researchers for a broad range of uses from semiconductor to life science applications.
“The AIST system was the first ORION PLUS microscope delivered that was designed and built to achieve the 0.35nm probe size specification. The EMSL ORION PLUS instrument is the second tool of this generation, and we are confident that our production and field service team will accomplish this installation equally well as with the AIST system,” comments Voci.
GSA announces results of 2010 BOD elections
SAN JOSE, USA: The Global Semiconductor Alliance (GSA) announces the results of its 2010 Board of Directors’ member election and one new board appointment. The GSA BOD defines the organization’s strategic vision and direction.
Dr. Roawen Chen, vice president of manufacturing operations, Marvell Semiconductor, was elected to fill the only open semiconductor position, which will run for a three-year term.
With 15 years of global semiconductor experience, Dr. Chen brings a plethora of industry knowledge and experience, spanning foundry business and engineering operations to world-class business development, strategies of cross-continental partnerships and visionary leadership for global marketing and business plans.
Dr. Chen joined Marvell Semiconductor in 2000, managing foundry operations and contributing to the company’s growth and business infrastructure. He was promoted to vice president of manufacturing operations in 2005 and has since held other titles and responsibilities within the company.
Between 2007 and 2009, Dr. Chen expanded his role to include general manager for Marvell’s connectivity business unit – spearheading the communications and computing business unit and managing consumer-driven, popular product lines, such as Marvell’s smartphone platforms, ARM-based application processors and power management ICs. Dr. Chen’s efforts, commitment and accomplishments enrich both Marvell and the semiconductor industry.
Prior to Marvell, Dr. Chen held technical positions at TSMC and Intel Corp. Dr. Chen holds a bachelor’s degree in Physics from National Tsing-Hua University and a Ph.D in Electrical Engineering and Computer Science from UC-Berkeley.
“I am honored to be elected to serve in this leadership role for the GSA,” said Dr. Chen. “GSA has significantly contributed to the well-being of the industry and I look forward to leveraging my experience to build on the strong foundation that has been established.”
Due to the emergence and increasing reliance on the outsourced operations model, GSA strategically added a value chain producer (VCP) position to represent the growing number of companies that both offer and utilize this model. A VCP is defined as a company that collaborates with foundries, IP and service providers, EDA suppliers, package, assembly and test operations in designing and producing chips for fabless IC, IDM and OEM companies.
VCPs optimize the economics of customer value chains and enable customers to focus on their product differentiation and market growth. VCPs earn revenue by shipping packaged, tested products with the customers' logo.
Jack Harding, chairman, president and chief executive officer of eSilicon Corp., was elected to the new value chain producer position and will serve a two-year term. Jack previously served on the GSA board of directors in a semiconductor position for three years. He also serves on the GSA Finance Committee.
Jack Harding brings more than 20 years of executive management experience in the electronics industry to eSilicon. Prior to co-founding eSilicon, he served as president and CEO of Cadence Design Systems; during his tenure, Cadence was the world's largest supplier of electronic design automation (EDA) software. Harding entered Cadence upon the acquisition of Cooper & Chyan Technology (CCT), where he served as the president and CEO, and was responsible for taking the company public. Prior to CCT, Harding served as executive vice president of Zycad Corporation. He began his career with distinction at IBM.
Harding earned his bachelor's degree in economics and chemistry from Drew University and attended Stern School of Business at New York University. Mr. Harding has held various directorships in both public and private organizations and is currently on the Board of Directors of RF Micro Devices (NASDAQ: RFMD).
Harding has also held leadership roles at Drew University and Indiana University where he was Vice Chairman of the Board of Trustees and a member of its School of Public and Environmental Affairs (SPEA) Advisory Board. In the public policy arena Mr. Harding has served as a member of the Steering Committee at the US Council on Competitiveness and was a former National Academies' Committee member for Software, Growth and the Future of the U.S. Economy. He is a frequent international speaker on the topics of innovation, entrepreneurship and semiconductor trends and policies.
“I am honored to be elected to GSA’s Board as the first VCP director,” said Harding. “GSA recognized the importance of the VCP market and I look forward to representing the needs and concerns of the VCP market which includes the VCPs, customers and the supply chain companies that are part of the ecosystem.”
In addition to the two elected members, GSA’s board appointed Dr. Douglas Grose, chief executive officer of GLOBALFOUNDRIES to represent the foundry director position left vacant when Chartered Semiconductor Manufacturing was acquired by Advanced Technology Investment Company LLC (ATIC) of Abu Dhabi and subsequently merged with GLOBALFOUNDRIES.
In his role as chief executive officer, Grose defines the vision and global business strategy of GLOBALFOUNDRIES as it charts new ground in leading-edge semiconductor manufacturing innovation. Prior to joining GLOBALFOUNDRIES, Grose served as senior vice president of technology development, manufacturing and supply chain for Advanced Micro Devices, Inc. (AMD). In this role, he managed AMD’s global manufacturing and process technology operations, including AMD fabrication facilities, AMD foundry relationships and AMD’s global supply chain.
Prior to joining AMD in 2007, Grose spent 25 years at IBM as general manager of technology development and manufacturing for the systems and technology group. Before joining IBM, Grose was an executive vice president and chief operating officer of Nanotech Resources, Inc. Grose holds a doctorate degree in materials engineering and a master’s degree in business administration and science.
“The GSA is one of the preeminent organizations in the semiconductor industry and I am pleased to join such an esteemed group of leaders with this appointment. I look forward to working with my fellow board members to build a strong and diverse ecosystem that identifies challenges and opportunities in the marketplace that create new value for the semiconductor industry as a whole,” stated Doug Grose.
The 2010 GSA board members offer the necessary leadership that will guide the semiconductor industry to continued success. In its 15 years, GSA has consistently broadened its global representation that now consists of a membership base spanning large multinational corporations to start-up companies in their initial funding phase. Geographically, GSA represents every major region within the semiconductor industry. The Alliance has expanded its international presence in the EMEA and Asia by adding Regional Leadership Directors to the board.
“We welcome our 2010 directors and are pleased to have such astute thought leaders who share the vision of our organization,” said Jodi Shelton, co-founder and president of GSA. “The broad range of companies represented reflects the entire supply chain, whose varying perspectives provide direction to address the opportunities and challenges of the global semiconductor industry.”
A total of 25 board members will provide their leadership in 2010. In addition to the three new GSA board members, returning members include:
* Dr. Nicky Lu, GSA board chairman, chairman and CEO, Etron Technology Inc.
* Joep Van Beurden, GSA board vice chairman, CEO, CSR Plc
* Jodi Shelton, GSA co-founder and president
* Dr. Craig Barratt, president and chief executive officer, Atheros Communications
* Danny Biran, senior vice president of marketing, Altera Corp.
Rick Cassidy, president, north America, TSMC
* Guillaume d’Eyssautier, CEO, ADD Semiconductor
* Dr. Aart de Geus, chairman and CEO, Synopsys
* Colin Harris, chief operating officer, PMC-Sierra
* Ana Molnar Hunter, vice president of technology, system LSI, Samsung Semiconductor
* Mark Ireland, vice president, semiconductor platforms, IBM
* Kenneth Joyce, president and CEO, Amkor Technology
* Neil Kim, senior vice president, operations and central engineering, Broadcom
* Loic Lietar, corporate VP, corporate business development, STMicroelectronics
* Steve Michael, vice president of operations and R&QA, Exar Corp.
* Steve Mollenkopf, executive VP and president, QUALCOMM CDMA Technologies (QCT)
* Dr. Naveed Sherwani, founder, president and CEO, Open-Silicon
* Deborah Shoquist, executive vice president of operations, NVIDIA Corp.
* Lip-Bu Tan, president and CEO, Cadence Design Systems Inc.
* Vincent Tong, senior VP, worldwide quality and new product introductions, Xilinx
* Jason Wang, president, United Microelectronics Corp. (UMC USA)
* Dr. Tien Wu, director and COO, Advanced Semiconductor Engineering Inc. (ASE Inc.) and CEO, ISE Labs.
Dr. Roawen Chen, vice president of manufacturing operations, Marvell Semiconductor, was elected to fill the only open semiconductor position, which will run for a three-year term.
With 15 years of global semiconductor experience, Dr. Chen brings a plethora of industry knowledge and experience, spanning foundry business and engineering operations to world-class business development, strategies of cross-continental partnerships and visionary leadership for global marketing and business plans.
Dr. Chen joined Marvell Semiconductor in 2000, managing foundry operations and contributing to the company’s growth and business infrastructure. He was promoted to vice president of manufacturing operations in 2005 and has since held other titles and responsibilities within the company.
Between 2007 and 2009, Dr. Chen expanded his role to include general manager for Marvell’s connectivity business unit – spearheading the communications and computing business unit and managing consumer-driven, popular product lines, such as Marvell’s smartphone platforms, ARM-based application processors and power management ICs. Dr. Chen’s efforts, commitment and accomplishments enrich both Marvell and the semiconductor industry.
Prior to Marvell, Dr. Chen held technical positions at TSMC and Intel Corp. Dr. Chen holds a bachelor’s degree in Physics from National Tsing-Hua University and a Ph.D in Electrical Engineering and Computer Science from UC-Berkeley.
“I am honored to be elected to serve in this leadership role for the GSA,” said Dr. Chen. “GSA has significantly contributed to the well-being of the industry and I look forward to leveraging my experience to build on the strong foundation that has been established.”
Due to the emergence and increasing reliance on the outsourced operations model, GSA strategically added a value chain producer (VCP) position to represent the growing number of companies that both offer and utilize this model. A VCP is defined as a company that collaborates with foundries, IP and service providers, EDA suppliers, package, assembly and test operations in designing and producing chips for fabless IC, IDM and OEM companies.
VCPs optimize the economics of customer value chains and enable customers to focus on their product differentiation and market growth. VCPs earn revenue by shipping packaged, tested products with the customers' logo.
Jack Harding, chairman, president and chief executive officer of eSilicon Corp., was elected to the new value chain producer position and will serve a two-year term. Jack previously served on the GSA board of directors in a semiconductor position for three years. He also serves on the GSA Finance Committee.
Jack Harding brings more than 20 years of executive management experience in the electronics industry to eSilicon. Prior to co-founding eSilicon, he served as president and CEO of Cadence Design Systems; during his tenure, Cadence was the world's largest supplier of electronic design automation (EDA) software. Harding entered Cadence upon the acquisition of Cooper & Chyan Technology (CCT), where he served as the president and CEO, and was responsible for taking the company public. Prior to CCT, Harding served as executive vice president of Zycad Corporation. He began his career with distinction at IBM.
Harding earned his bachelor's degree in economics and chemistry from Drew University and attended Stern School of Business at New York University. Mr. Harding has held various directorships in both public and private organizations and is currently on the Board of Directors of RF Micro Devices (NASDAQ: RFMD).
Harding has also held leadership roles at Drew University and Indiana University where he was Vice Chairman of the Board of Trustees and a member of its School of Public and Environmental Affairs (SPEA) Advisory Board. In the public policy arena Mr. Harding has served as a member of the Steering Committee at the US Council on Competitiveness and was a former National Academies' Committee member for Software, Growth and the Future of the U.S. Economy. He is a frequent international speaker on the topics of innovation, entrepreneurship and semiconductor trends and policies.
“I am honored to be elected to GSA’s Board as the first VCP director,” said Harding. “GSA recognized the importance of the VCP market and I look forward to representing the needs and concerns of the VCP market which includes the VCPs, customers and the supply chain companies that are part of the ecosystem.”
In addition to the two elected members, GSA’s board appointed Dr. Douglas Grose, chief executive officer of GLOBALFOUNDRIES to represent the foundry director position left vacant when Chartered Semiconductor Manufacturing was acquired by Advanced Technology Investment Company LLC (ATIC) of Abu Dhabi and subsequently merged with GLOBALFOUNDRIES.
In his role as chief executive officer, Grose defines the vision and global business strategy of GLOBALFOUNDRIES as it charts new ground in leading-edge semiconductor manufacturing innovation. Prior to joining GLOBALFOUNDRIES, Grose served as senior vice president of technology development, manufacturing and supply chain for Advanced Micro Devices, Inc. (AMD). In this role, he managed AMD’s global manufacturing and process technology operations, including AMD fabrication facilities, AMD foundry relationships and AMD’s global supply chain.
Prior to joining AMD in 2007, Grose spent 25 years at IBM as general manager of technology development and manufacturing for the systems and technology group. Before joining IBM, Grose was an executive vice president and chief operating officer of Nanotech Resources, Inc. Grose holds a doctorate degree in materials engineering and a master’s degree in business administration and science.
“The GSA is one of the preeminent organizations in the semiconductor industry and I am pleased to join such an esteemed group of leaders with this appointment. I look forward to working with my fellow board members to build a strong and diverse ecosystem that identifies challenges and opportunities in the marketplace that create new value for the semiconductor industry as a whole,” stated Doug Grose.
The 2010 GSA board members offer the necessary leadership that will guide the semiconductor industry to continued success. In its 15 years, GSA has consistently broadened its global representation that now consists of a membership base spanning large multinational corporations to start-up companies in their initial funding phase. Geographically, GSA represents every major region within the semiconductor industry. The Alliance has expanded its international presence in the EMEA and Asia by adding Regional Leadership Directors to the board.
“We welcome our 2010 directors and are pleased to have such astute thought leaders who share the vision of our organization,” said Jodi Shelton, co-founder and president of GSA. “The broad range of companies represented reflects the entire supply chain, whose varying perspectives provide direction to address the opportunities and challenges of the global semiconductor industry.”
A total of 25 board members will provide their leadership in 2010. In addition to the three new GSA board members, returning members include:
* Dr. Nicky Lu, GSA board chairman, chairman and CEO, Etron Technology Inc.
* Joep Van Beurden, GSA board vice chairman, CEO, CSR Plc
* Jodi Shelton, GSA co-founder and president
* Dr. Craig Barratt, president and chief executive officer, Atheros Communications
* Danny Biran, senior vice president of marketing, Altera Corp.
Rick Cassidy, president, north America, TSMC
* Guillaume d’Eyssautier, CEO, ADD Semiconductor
* Dr. Aart de Geus, chairman and CEO, Synopsys
* Colin Harris, chief operating officer, PMC-Sierra
* Ana Molnar Hunter, vice president of technology, system LSI, Samsung Semiconductor
* Mark Ireland, vice president, semiconductor platforms, IBM
* Kenneth Joyce, president and CEO, Amkor Technology
* Neil Kim, senior vice president, operations and central engineering, Broadcom
* Loic Lietar, corporate VP, corporate business development, STMicroelectronics
* Steve Michael, vice president of operations and R&QA, Exar Corp.
* Steve Mollenkopf, executive VP and president, QUALCOMM CDMA Technologies (QCT)
* Dr. Naveed Sherwani, founder, president and CEO, Open-Silicon
* Deborah Shoquist, executive vice president of operations, NVIDIA Corp.
* Lip-Bu Tan, president and CEO, Cadence Design Systems Inc.
* Vincent Tong, senior VP, worldwide quality and new product introductions, Xilinx
* Jason Wang, president, United Microelectronics Corp. (UMC USA)
* Dr. Tien Wu, director and COO, Advanced Semiconductor Engineering Inc. (ASE Inc.) and CEO, ISE Labs.
Acuity expands high-performance MEMS pressure sensor range
FREMONT, USA: Acuity Inc., a fabless designer of stable high-performance MEMS pressure sensors, is adding 50 millibar (mbar) and 100 mbar full-scale ranges to the existing 20 mbar full scale range of its AC3030 series low-pressure sensor die.
Both structural and process improvements in the AC3030 design provide enhanced stability over traditional low-pressure parts. The new ranges are based on the same high-performance design as the 20 mbar device.
"Our die customers have been particularly pleased with the very low zero-drift and tight parameter distribution of our AC3030 series chips," comments Henry Allen, Vice President of Acuity, Inc. "The die enable very accurate low-pressure measurements and are especially key in many amplified designs."
Key attributes of the device include:
• Very low-mass diaphragm which overcomes g-force and vibration errors, and providing higher accuracy and overcoming the costs associated with correction schemes.
• Very small footprint (1.6 mm square) which both reduces the effects of package stress and lowers chip costs.
"The real strength of this design is seen in low pressure instrumentation applications in industrial measurement, medical and HVAC markets," said Jim Knutti, President of Acuity, Inc. "We currently supply die on an OEM basis to a number of sensor companies to replace existing die as well as to open new applications. We developed these additional ranges in direct response to customer demand for the same stability and cost advantages that we provide with our 20 mbar parts."
The AC3030 structure relies on several key process steps and the wafers are fabricated under a manufacturing agreement with MEMS foundry Semefab.
All three ranges of the AC3030 die are currently in production.
Both structural and process improvements in the AC3030 design provide enhanced stability over traditional low-pressure parts. The new ranges are based on the same high-performance design as the 20 mbar device.
"Our die customers have been particularly pleased with the very low zero-drift and tight parameter distribution of our AC3030 series chips," comments Henry Allen, Vice President of Acuity, Inc. "The die enable very accurate low-pressure measurements and are especially key in many amplified designs."
Key attributes of the device include:
• Very low-mass diaphragm which overcomes g-force and vibration errors, and providing higher accuracy and overcoming the costs associated with correction schemes.
• Very small footprint (1.6 mm square) which both reduces the effects of package stress and lowers chip costs.
"The real strength of this design is seen in low pressure instrumentation applications in industrial measurement, medical and HVAC markets," said Jim Knutti, President of Acuity, Inc. "We currently supply die on an OEM basis to a number of sensor companies to replace existing die as well as to open new applications. We developed these additional ranges in direct response to customer demand for the same stability and cost advantages that we provide with our 20 mbar parts."
The AC3030 structure relies on several key process steps and the wafers are fabricated under a manufacturing agreement with MEMS foundry Semefab.
All three ranges of the AC3030 die are currently in production.
SiTune unveils innovative mobile DVB-T CMOS SoC exceeding MBRAI spec
2010 NAB Show, SAN JOSE, USA: SiTune Corp., a leader in CMOS radio-frequency (RF), mixed signal and signal processing solutions for mobile, cable and broadcast TV, has announced a state-of-the-art and revolutionary mobile DVB-T receiver SOC. STN-10R3000 is a highly integrated mobile DVB-T demodulator plus multi-band RF tuner in a single die with small foot print that deliver best signal reception and mobility performance in all modes of the DVB-T standard especially in 64 QAM modulation.
Precise and clear reception of DVB-T signal in different modulations in both fixed and mobile application is achieved by integration of SiTune advance mobile RF tuner architecture (P2TUNE) with SiTune latest COFDM based demodulator. STN10R3000 is packed with state of art signal processing techniques and multifaceted algorithms.
"This unique low cost chip is implemented in the advanced 130 nm CMOS process to deliver a comprehensive solution that minimizes customer development time and cost," said Vahid Toosi President and CEO of SiTune.
"STN10R3000 resolves mobile DVB-T challenges by achieving best in class Doppler and reception performance under low power consumption while surpassing MBRAI2.0 and NorDig 2.0 specification with wide margin with a small foot print and minimum BOM cost."
SiTune will demonstrate the STN-10R3000 by appointment during NAB SHOW 2010 (US/Las Vegas) (April 13-14). Limited Engineering Samples and evaluation kits are available now with production release in Q2 2010.
Precise and clear reception of DVB-T signal in different modulations in both fixed and mobile application is achieved by integration of SiTune advance mobile RF tuner architecture (P2TUNE) with SiTune latest COFDM based demodulator. STN10R3000 is packed with state of art signal processing techniques and multifaceted algorithms.
"This unique low cost chip is implemented in the advanced 130 nm CMOS process to deliver a comprehensive solution that minimizes customer development time and cost," said Vahid Toosi President and CEO of SiTune.
"STN10R3000 resolves mobile DVB-T challenges by achieving best in class Doppler and reception performance under low power consumption while surpassing MBRAI2.0 and NorDig 2.0 specification with wide margin with a small foot print and minimum BOM cost."
SiTune will demonstrate the STN-10R3000 by appointment during NAB SHOW 2010 (US/Las Vegas) (April 13-14). Limited Engineering Samples and evaluation kits are available now with production release in Q2 2010.
CEA-Leti’s hybrid metrology project targets better R&D cycle times and yields at sub-28nm nodes
GRENOBLE, FRANCE: CEA-Leti, a leading global research center committed to creating and commercializing innovation in micro- and nanotechnologies, said today that its Hybrid Metrology Project has developed a way to reduce measurement uncertainty in the sub-28nm nodes.
The continuous shrinkage of IC feature dimensions has made measurement uncertainty one of the key factors to be controlled to guarantee sufficient production yield.
Researchers are challenged to get accurate measurements of sub-40nm dense trenches and contact holes coming from 193-immersion lithography or e-beam lithography. Top-down CD-SEM cannot provide profile information. Moreover, electron-material interaction (i.e., proximity effect, resist shrinkage phenomenon) leads to significant CD bias in the final measurements.
The Hybrid Metrology Project has shown noteworthy results in reducing measurement uncertainty at sub-28nm nodes using an alternative 3D-AFM (atomic force microscope) mode for CD measurement, the Deep Trench Mode. While traditionally this mode has been used for height measurement, it can be extended for certain applications to reach nanometer-scale accuracy of CD measurements employing certain optimized scan parameters.
The project’s research findings, which were presented at the SPIE Advanced Lithography Conference in San Jose, Calif., in February, also show significant limitations to aggressive trench-dimension measurements using the conventional 3D-AFM CD mode.
Hybrid metrology is related to the reference CD metrology feedback loop in conventional CD metrology process control that is mostly done by CD-SEM and scatterometry in fabs. Reference metrology is a means of accelerating R&D and cutting production costs, compared to CD-SEM and scatterometry techniques, through finer process window definition.
“The Hybrid Metrology Project puts CEA-Leti in a unique position of being able to help both equipment companies and chipmakers,” said Laurent Malier, CEO of CEA-Leti. “We anticipate helping equipment makers develop a CD metrology production tool dedicated to hybrid metrology that will reduce R&D cycle time and improve production yield for manufacturers.”
Project leader Johann Foucher, who presented the SPIE paper, said CD hybrid metrology potentially could be introduced in high-volume manufacturing for sub-28nm nodes. That would require hybrid metrology tools and software that will simplify the communication and optimization of complementary techniques to obtain a relevant and low-cost CD metrology configuration.
This hybrid metrology platform would facilitate and optimize data exchange between reference and production techniques. It decreases the number of measurement iterations as a function of accuracy control because it prevents introduction of residual errors due to poor accuracy of the initial production CD metrology technique.
CEA-Leti researchers found that by using a reference in-line CD technique such as CD-AFM, it is possible to replace most cross-section images currently done by scanning electron microscopy or transmission electron microscopy. The result is faster R&D cycle time for any kind of process control (lithography and etching).
For yield production, the final result is the same as for R&D because the accuracy lowers the total-measurement-uncertainty parameter and guarantees better CD uniformity and process window definition on a full wafer. The fabricated devices would have fewer performance variations from die to die, wafer to wafer and lot to lot, which results in higher production yield.
The Hybrid Metrology Project intends to develop all methodology and infrastructure needed to introduce hybrid metrology into high-volume manufacturing. It has already explored very advanced 3D-AFM tips that have been used with the enhanced Deep Trench Mode parameters, and ways of pushing the limits of 3D-AFM technology for measuring tight dimensions that could extend its capability for future nodes.
The continuous shrinkage of IC feature dimensions has made measurement uncertainty one of the key factors to be controlled to guarantee sufficient production yield.
Researchers are challenged to get accurate measurements of sub-40nm dense trenches and contact holes coming from 193-immersion lithography or e-beam lithography. Top-down CD-SEM cannot provide profile information. Moreover, electron-material interaction (i.e., proximity effect, resist shrinkage phenomenon) leads to significant CD bias in the final measurements.
The Hybrid Metrology Project has shown noteworthy results in reducing measurement uncertainty at sub-28nm nodes using an alternative 3D-AFM (atomic force microscope) mode for CD measurement, the Deep Trench Mode. While traditionally this mode has been used for height measurement, it can be extended for certain applications to reach nanometer-scale accuracy of CD measurements employing certain optimized scan parameters.
The project’s research findings, which were presented at the SPIE Advanced Lithography Conference in San Jose, Calif., in February, also show significant limitations to aggressive trench-dimension measurements using the conventional 3D-AFM CD mode.
Hybrid metrology is related to the reference CD metrology feedback loop in conventional CD metrology process control that is mostly done by CD-SEM and scatterometry in fabs. Reference metrology is a means of accelerating R&D and cutting production costs, compared to CD-SEM and scatterometry techniques, through finer process window definition.
“The Hybrid Metrology Project puts CEA-Leti in a unique position of being able to help both equipment companies and chipmakers,” said Laurent Malier, CEO of CEA-Leti. “We anticipate helping equipment makers develop a CD metrology production tool dedicated to hybrid metrology that will reduce R&D cycle time and improve production yield for manufacturers.”
Project leader Johann Foucher, who presented the SPIE paper, said CD hybrid metrology potentially could be introduced in high-volume manufacturing for sub-28nm nodes. That would require hybrid metrology tools and software that will simplify the communication and optimization of complementary techniques to obtain a relevant and low-cost CD metrology configuration.
This hybrid metrology platform would facilitate and optimize data exchange between reference and production techniques. It decreases the number of measurement iterations as a function of accuracy control because it prevents introduction of residual errors due to poor accuracy of the initial production CD metrology technique.
CEA-Leti researchers found that by using a reference in-line CD technique such as CD-AFM, it is possible to replace most cross-section images currently done by scanning electron microscopy or transmission electron microscopy. The result is faster R&D cycle time for any kind of process control (lithography and etching).
For yield production, the final result is the same as for R&D because the accuracy lowers the total-measurement-uncertainty parameter and guarantees better CD uniformity and process window definition on a full wafer. The fabricated devices would have fewer performance variations from die to die, wafer to wafer and lot to lot, which results in higher production yield.
The Hybrid Metrology Project intends to develop all methodology and infrastructure needed to introduce hybrid metrology into high-volume manufacturing. It has already explored very advanced 3D-AFM tips that have been used with the enhanced Deep Trench Mode parameters, and ways of pushing the limits of 3D-AFM technology for measuring tight dimensions that could extend its capability for future nodes.
Konica Minolta adopts EVE’s ZeBu emulation platform
SAN JOSE, USA: EVE, a leader in hardware/software co-verification, announced that Konica Minolta Technology Center Inc., of Tokyo, Japan, has selected its ZeBu (for Zero Bugs) hardware-assisted verification platform for the design of its high-speed, high-performance large-scale integrated circuits (LSIs) used in image processing.
ZeBu was chosen after an evaluation of cost-effective, commercially available emulation platforms that could accelerate simulation of Konica Minolta’s iImage Processing LSI designs.
“We have been delighted to discover that ZeBu cut four days of RTL simulation to one and half hours in co-emulation driven by the very same Verilog test benches, practically accelerating simulation by 80 times,” says Takashi Kawabe, engineer of Architecture R&D Division, System Solution Technology R&D Laboratories at Konica Minolta Technology Center Inc.
“In a couple of months, ZeBu found several hard-to-find bugs that simulation would not have been able to pinpoint in any practical amount of time. We also valued EVE team’s effective and knowledgeable support that permitted us to keep on schedule.”
“We are delighted to be chosen by Konica Minolta and are appreciative of its diligence in conducting the evaluation,” remarks Dr. Luc Burgun, EVE’s chief executive officer and president. “We are confident that, by virtue of its fast execution, ZeBu will significantly accelerate the debugging of Konica Minolta’s designs and ultimately speed time to market of its new designs.”
ZeBu was chosen after an evaluation of cost-effective, commercially available emulation platforms that could accelerate simulation of Konica Minolta’s iImage Processing LSI designs.
“We have been delighted to discover that ZeBu cut four days of RTL simulation to one and half hours in co-emulation driven by the very same Verilog test benches, practically accelerating simulation by 80 times,” says Takashi Kawabe, engineer of Architecture R&D Division, System Solution Technology R&D Laboratories at Konica Minolta Technology Center Inc.
“In a couple of months, ZeBu found several hard-to-find bugs that simulation would not have been able to pinpoint in any practical amount of time. We also valued EVE team’s effective and knowledgeable support that permitted us to keep on schedule.”
“We are delighted to be chosen by Konica Minolta and are appreciative of its diligence in conducting the evaluation,” remarks Dr. Luc Burgun, EVE’s chief executive officer and president. “We are confident that, by virtue of its fast execution, ZeBu will significantly accelerate the debugging of Konica Minolta’s designs and ultimately speed time to market of its new designs.”
e2v extends availability of Freescale 68K-series MPUs
GRENOBLE, FRANCE: e2v announced the long-term availability of the Freescale 68K microprocessor line by continuing manufacture for all markets following the discontinuance of these popular products by Freescale Semiconductor.
The companies have agreed that once Freescale ceases production of the 68020, 68882 and 68C000 processors, e2v’s portfolio of high-reliability grade products will be extended with commercial-grade versions in both plastic and ceramic packages.
This arrangement is based on e2v’s long-term experience in extending the availability of strategic semiconductors used in the aerospace and defense markets. These Freescale products will remain available from e2v for the next 10 years, or longer.
“As our long-term extended reliability applications partner, e2v is now serving other industries with its extended life solutions,” said June Lewis, Consumer & Industrial Business Operation Manager, Microcontrollers Group at Freescale Semiconductor. “e2v is alone in its category with the depth and breadth of products and services needed by both semiconductor companies and electronics systems OEMs. “
As a Freescale aerospace and defense partner, e2v has been licensed by Freescale to deliver high-reliability versions of their products to the aerospace, defence and other extended reliability markets, for more than 25 years.
The current arrangement allows e2v to build and sell its own products, from the 68K family to high-performance Power Architecture devices, by sourcing commercial wafers and devices from Freescale and then repackaging, screening, characterising and testing at extended temperatures. Utilising its proven, reliable wafer banking methodology, e2v will offer a comprehensive range of products for this extended period.
“We are extending our product range for a wider set of applications, where system redesign is complex,” said Thierry Gouvernel, Head of Strategic Business Development, with the Specialist Semiconductor division of e2v. “This confirms our commitment to the military-aerospace industry and extends our experience in obsolescence mitigation to other key markets.”
These products are available now. The e2v sales organisation will coordinate with its Freescale counterparts to ensure a smooth transition and continuity of supply.
The companies have agreed that once Freescale ceases production of the 68020, 68882 and 68C000 processors, e2v’s portfolio of high-reliability grade products will be extended with commercial-grade versions in both plastic and ceramic packages.
This arrangement is based on e2v’s long-term experience in extending the availability of strategic semiconductors used in the aerospace and defense markets. These Freescale products will remain available from e2v for the next 10 years, or longer.
“As our long-term extended reliability applications partner, e2v is now serving other industries with its extended life solutions,” said June Lewis, Consumer & Industrial Business Operation Manager, Microcontrollers Group at Freescale Semiconductor. “e2v is alone in its category with the depth and breadth of products and services needed by both semiconductor companies and electronics systems OEMs. “
As a Freescale aerospace and defense partner, e2v has been licensed by Freescale to deliver high-reliability versions of their products to the aerospace, defence and other extended reliability markets, for more than 25 years.
The current arrangement allows e2v to build and sell its own products, from the 68K family to high-performance Power Architecture devices, by sourcing commercial wafers and devices from Freescale and then repackaging, screening, characterising and testing at extended temperatures. Utilising its proven, reliable wafer banking methodology, e2v will offer a comprehensive range of products for this extended period.
“We are extending our product range for a wider set of applications, where system redesign is complex,” said Thierry Gouvernel, Head of Strategic Business Development, with the Specialist Semiconductor division of e2v. “This confirms our commitment to the military-aerospace industry and extends our experience in obsolescence mitigation to other key markets.”
These products are available now. The e2v sales organisation will coordinate with its Freescale counterparts to ensure a smooth transition and continuity of supply.
Legacy releases 8GB very low profile modules for server apps
SAN CLEMENTE, USA: Design engineers and system integrators now have a new very low profile option for both registered dual in-line memory modules (RDIMMs) and mini-RDIMMs. Using Legacy Electronics’ patented Multiple Device Canopy (MDC) processes, designers can increase existing module density and still maintain 2-rank capability.
“It’s every engineer’s dream to be able to add a whole new dimension to his or her design capabilities. And that’s what MDC does for us; it gives us vertical space.”
Jason Engle, president of Legacy Electronics, explained.
“Our 4Gbit MDC DRAM is functionally and electrically equivalent to a dual die package DRAM, and can be configured to provide significant cost and space savings. We are currently offering two JEDEC Standard VLP registered ECC DIMM modules using the MDC® solution: either a DDR2 8GB RDIMM or a DDR2 Mini-RDIMM. Custom MDC solutions are also available.”
Don Mecker, Legacy’s chief technology officer, added: “It’s every engineer’s dream to be able to add a whole new dimension to his or her design capabilities. And that’s what MDC® does for us; it gives us vertical space.”
The two 8GB DDR2 RDIMMs provide the 18.3 mm height low profile form factor, on either a 240-pin (RDIMM) or 244-pin (mini-RDIMM) glass epoxy substrate.
“It’s every engineer’s dream to be able to add a whole new dimension to his or her design capabilities. And that’s what MDC does for us; it gives us vertical space.”
Jason Engle, president of Legacy Electronics, explained.
“Our 4Gbit MDC DRAM is functionally and electrically equivalent to a dual die package DRAM, and can be configured to provide significant cost and space savings. We are currently offering two JEDEC Standard VLP registered ECC DIMM modules using the MDC® solution: either a DDR2 8GB RDIMM or a DDR2 Mini-RDIMM. Custom MDC solutions are also available.”
Don Mecker, Legacy’s chief technology officer, added: “It’s every engineer’s dream to be able to add a whole new dimension to his or her design capabilities. And that’s what MDC® does for us; it gives us vertical space.”
The two 8GB DDR2 RDIMMs provide the 18.3 mm height low profile form factor, on either a 240-pin (RDIMM) or 244-pin (mini-RDIMM) glass epoxy substrate.
CriticalBlue, MIPS enable software developers to quantify benefits of migrating to MIPS32-based multicore platforms
USA: CriticalBlue, a pioneer in embedded multicore software analysis, exploration and verification tools, and MIPS Technologies Inc., a leading provider of industry-standard processor architectures and cores for digital consumer, home networking, wireless, communications and business applications, announced enhanced and groundbreaking support for the MIPS32 architecture within CriticalBlue's Prism product.
Software developers will now be able to analyze their existing software applications and quickly assess the tangible benefits of migrating to MIPS32 multithreaded and multicore devices.
This announcement continues the deepening of Prism capabilities to enable leading multicore vendors such as MIPS Technologies to provide an ecosystem to their customers which can clearly demonstrate the differentiation of the MIPS32 architecture in the context of the customers' own software applications.
Prism is an award winning Eclipse-based embedded multicore programming system which allows software engineers to easily assess and realize the full potential of multicore processors without significant changes to their development flow.
Prism analyzes the behavior of code running on hardware development boards, virtual machines or simulators. It allows engineers to take their existing sequential code, and before making any changes, explore and analyze opportunities for concurrency. Having identified the optimal parallelization strategies in this way, developers will implement parallel structures, and use Prism again to verify efficient and thread-safe operations.
The new Prism capabilities for the MIPS32 architecture are being developed in two phases. The first phase, available today, is an Instruction level Platform Support Package (PSP) for the MIPS32 architecture. This supports the analysis of software applications running under Linux on either hardware development boards or virtual machines such as QEMU. End users are split in their preference for development boards and simulators for development, and therefore Prism supports both flows.
MIPS developers will now be able to trace their existing software applications on a single core platform and then quickly analyze the potential benefits of migrating to a multicore architecture, all in the familiar Eclipse framework.
In the second phase, available at the end of April 2010, a Core level PSP for the MIPS32 architecture will bring an additional level of accuracy to software developers. Going beyond software mapping to multicore hardware, with this release users will be able to quantify the benefit of software migration to hardware multithreading available in certain MIPS cores, such as the MIPS32 34K and 1004K families.
Users will be able to analyze data cache misses on a thread, function or source line level, resulting in an ability to see the impact of such cache misses on the overall concurrent schedule. All of this can be done on an existing unmodified software application running on a single core model or development board. The MIPS32 Core PSP is the first Core level PSP to support hardware multithreading impact analysis.
Software developers will now be able to analyze their existing software applications and quickly assess the tangible benefits of migrating to MIPS32 multithreaded and multicore devices.
This announcement continues the deepening of Prism capabilities to enable leading multicore vendors such as MIPS Technologies to provide an ecosystem to their customers which can clearly demonstrate the differentiation of the MIPS32 architecture in the context of the customers' own software applications.
Prism is an award winning Eclipse-based embedded multicore programming system which allows software engineers to easily assess and realize the full potential of multicore processors without significant changes to their development flow.
Prism analyzes the behavior of code running on hardware development boards, virtual machines or simulators. It allows engineers to take their existing sequential code, and before making any changes, explore and analyze opportunities for concurrency. Having identified the optimal parallelization strategies in this way, developers will implement parallel structures, and use Prism again to verify efficient and thread-safe operations.
The new Prism capabilities for the MIPS32 architecture are being developed in two phases. The first phase, available today, is an Instruction level Platform Support Package (PSP) for the MIPS32 architecture. This supports the analysis of software applications running under Linux on either hardware development boards or virtual machines such as QEMU. End users are split in their preference for development boards and simulators for development, and therefore Prism supports both flows.
MIPS developers will now be able to trace their existing software applications on a single core platform and then quickly analyze the potential benefits of migrating to a multicore architecture, all in the familiar Eclipse framework.
In the second phase, available at the end of April 2010, a Core level PSP for the MIPS32 architecture will bring an additional level of accuracy to software developers. Going beyond software mapping to multicore hardware, with this release users will be able to quantify the benefit of software migration to hardware multithreading available in certain MIPS cores, such as the MIPS32 34K and 1004K families.
Users will be able to analyze data cache misses on a thread, function or source line level, resulting in an ability to see the impact of such cache misses on the overall concurrent schedule. All of this can be done on an existing unmodified software application running on a single core model or development board. The MIPS32 Core PSP is the first Core level PSP to support hardware multithreading impact analysis.
SiliconBlue selects Synopsys as FPGA synthesis partner for iCE65 mobileFPGA family
MOUNTAIN VIEW & SANTA CLARA: SiliconBlue, a leader in ultra-low power, single-chip SRAM FPGAs, announced that it has chosen Synopsys Synplify Pro FPGA synthesis software as the synthesis tool of choice for its iCE65 family of mobileFPGA devices.
SiliconBlue will distribute with its iCEcube™ software a version of the Synplify Pro software optimized for iCE65 devices. This version of the Synplify Pro software will have a thorough understanding of the unique architectural structure of SiliconBlue's devices, bringing Synopsys' world-class synthesis and mapping technology to SiliconBlue customers.
"The unprecedented success of our mobileFPGA devices has driven us to improve our development tool platform. Providing reliable, state-of-the-art synthesis is vital to our customers' success," said Kapil Shankar, CEO of SiliconBlue. "We chose Synopsys as our synthesis tool partner because of Synplify Pro's well-known standard of excellence in quality of results, ease-of-use, and overall platform robustness."
The customized version of the Synplify Pro software will contain all of the features of the standard version, and will be tuned for the SiliconBlue mobile FPGA device architecture. Because of its understanding of the iCE65 family architecture, the Synplify Pro software will be able to generate a high-performing netlist optimized for low area utilization – an important consideration in low power applications.
Users of the Synplify Pro software can choose to generate either Verilog or VHDL netlists to be used for simulation from the software. The Synplify Pro software will also be tightly integrated and tested with SiliconBlue's iCEcube software.
Gary Meyers, vice president and general manager of Synopsys' Synplicity Business Group said: "SiliconBlue is clearly extending the range of applications for FPGAs into the handheld market, reaching designers that have not used programmable logic in the past. The combination of Synplify Pro and iCE65 mobileFPGA devices allows both of our companies to cultivate this new market together."
SiliconBlue will distribute with its iCEcube™ software a version of the Synplify Pro software optimized for iCE65 devices. This version of the Synplify Pro software will have a thorough understanding of the unique architectural structure of SiliconBlue's devices, bringing Synopsys' world-class synthesis and mapping technology to SiliconBlue customers.
"The unprecedented success of our mobileFPGA devices has driven us to improve our development tool platform. Providing reliable, state-of-the-art synthesis is vital to our customers' success," said Kapil Shankar, CEO of SiliconBlue. "We chose Synopsys as our synthesis tool partner because of Synplify Pro's well-known standard of excellence in quality of results, ease-of-use, and overall platform robustness."
The customized version of the Synplify Pro software will contain all of the features of the standard version, and will be tuned for the SiliconBlue mobile FPGA device architecture. Because of its understanding of the iCE65 family architecture, the Synplify Pro software will be able to generate a high-performing netlist optimized for low area utilization – an important consideration in low power applications.
Users of the Synplify Pro software can choose to generate either Verilog or VHDL netlists to be used for simulation from the software. The Synplify Pro software will also be tightly integrated and tested with SiliconBlue's iCEcube software.
Gary Meyers, vice president and general manager of Synopsys' Synplicity Business Group said: "SiliconBlue is clearly extending the range of applications for FPGAs into the handheld market, reaching designers that have not used programmable logic in the past. The combination of Synplify Pro and iCE65 mobileFPGA devices allows both of our companies to cultivate this new market together."
Magma names Alok Mehrotra as MD of India operations
BANGALORE, INDIA: Magma Design Automation Inc. announced the appointment of Alok Mehrotra as managing director of the company's India operations. Mehrotra will report to Carl Burrow, Magma’s vice president of North America Sales.
"Managing our presence in India is a complex task, one that requires focus on both the indigenous engineering community and on supporting multinational customers with key installations here,” said Rajeev Madhavan, Magma's chairman and CEO.
"Alok’s background makes him well suited to this role – he has many years managing sales and support in India and elsewhere around the world, and he has the experience to work with our employees in India to continue the work that has contributed significantly to Magma’s success." More than 30 percent of Magma's worldwide workforce operates in the company's Bangalore, Mumbai and Noida facilities.
In assuming this role Mehrotra rejoins Magma for a second tour of duty. He previously worked at the company as director of Asia-Pacific Sales from 2001 to 2005, when he established operations in India, Singapore, Malaysia and Australia. Most recently Mehrotra served as director of sales for synthesis platform developer Synfora.
Previous experience includes serving as vice president of worldwide sales at Silicon Design Systems and at Sagantec North America; as director of business development for Aristo; and as IC design manager at Xilinx.
Mehrotra holds an MBA from Santa Clara University; an M.S. in electrical engineering from State University of New York at Stony Brook; and a B.S. degree in electronics & communication engineering from Manipal University in Karnataka, India.
"Managing our presence in India is a complex task, one that requires focus on both the indigenous engineering community and on supporting multinational customers with key installations here,” said Rajeev Madhavan, Magma's chairman and CEO.
"Alok’s background makes him well suited to this role – he has many years managing sales and support in India and elsewhere around the world, and he has the experience to work with our employees in India to continue the work that has contributed significantly to Magma’s success." More than 30 percent of Magma's worldwide workforce operates in the company's Bangalore, Mumbai and Noida facilities.
In assuming this role Mehrotra rejoins Magma for a second tour of duty. He previously worked at the company as director of Asia-Pacific Sales from 2001 to 2005, when he established operations in India, Singapore, Malaysia and Australia. Most recently Mehrotra served as director of sales for synthesis platform developer Synfora.
Previous experience includes serving as vice president of worldwide sales at Silicon Design Systems and at Sagantec North America; as director of business development for Aristo; and as IC design manager at Xilinx.
Mehrotra holds an MBA from Santa Clara University; an M.S. in electrical engineering from State University of New York at Stony Brook; and a B.S. degree in electronics & communication engineering from Manipal University in Karnataka, India.
Wind River expands hardware support for VxWorks 653 for integrated modular avionics systems
BANGALORE, INDIA: Wind River announced the immediate availability of the latest VxWorks 653 Platform, Wind River's real-time operating system for controlling complex, safety-critical ARINC 653 Integrated Modular Avionics (IMA) systems.
The new release of VxWorks 653 builds on VxWorks 653’s existing support for the Freescale e600 Power Architecture, with new board support packages (BSPs) for the Curtiss-Wright Controls VPX6-185 and the Wind River SBC8641D boards, and extends hardware support to Intel 32-bit processor architectures, including a BSP for the GE Intelligent Platforms V7768 board. Additionally, VxWorks 653 Platform now provides a new power-fail safe DO-178B file system.
VxWorks 653 is an ARINC 653, real-time operating system for safety-critical Integrated Modular Avionics platforms, used in over 180 subsystems by over 100 customers worldwide for more than 40 airframes, including the Boeing 787 Dreamliner.
VxWorks 653 implements a strict two-level time and space scheduling and separation environment that supports the deployment of applications at different DO-178B safety levels on a single instance of silicon with very high performance and very low jitter.
VxWorks 653 also includes DO-178B qualified development tools that allow the rapid insertion of new software modules into a shared avionics platform without forcing a re-test of the entire environment, enabling high levels of integration and system refresh.
“Our collaboration with Wind River to develop a new board support package for our VPX6-185 board demonstrates further commitment to support our mutual aerospace and defense customers,” said Lynn Patterson, vice president and general manager, Curtiss-Wright Controls Embedded Computing. “Together, Curtiss-Wright Controls Embedded Computing and Wind River deliver proven commercial off-the-shelf solutions for safety critical applications that can help customers enjoy decreased development time and costs.”
"In addition to meeting the rigorous safety requirements of the avionics industry, we are also committed to helping our customers reduce costs and development cycles," said Peter Cavill, general manager, Military & Aerospace Products, GE Intelligent Platforms. "By working together with Wind River and its VxWorks 653 Platform, we can provide our customers with the power and reliability needed to meet the stringent requirements of the industry, while helping them complete projects on time, realize cost savings and bring solutions to market faster."
Wind River is committed to enhancing its proven ARINC 653 operating system to continue to serve the needs of the avionics market. Key features of the latest VxWorks 653 Platform release include:
* Hardware support for Power Architecture (PowerPC) broadened to include a BSP for the Curtiss-Wright Controls VPX6-185 MPC8641D-based board.
* Hardware support extended to Intel 32-bit processor architectures, specifically for Intel Core 2 and Celeron processors, with BSP support for the GE Intelligent Platforms V7768 board.
* DO-178B File System, a power-fail safe file system ready for use in systems requiring DO-178B Level A certification. It can be used from every application partition in an IMA system, and is supported by a range of devices. The file system is an optional, add-on component, further enhancing the development capabilities of VxWorks 653 for customers and increasing their development efficiency.
* Advanced project and workflow support in Wind River Workbench that improves the ease of usability of VxWorks 653 for customers when creating, configuring and building time- and space-partitioned VxWorks 653 projects.
* Improved DO-178B Network Stack support, through the inclusion of TCP, IGMPv1, and multicast support with the UDP/IPv4 network stack.
All VxWorks 653 runtime components from prior releases, including the DO-178B TCP/IP network stack, are supported with an extensive set of RTCA DO‑178B and EUROCAE ED-12B Level A commercial-off-the-shelf (COTS) certification evidence.
“Providing customers with choice in hardware and software allows them to create solutions that can deliver better performance-to-cost ratios depending on their specific projects; it also helps to decrease overall operating expenditures,” said Marc Brown, vice president, Marketing and Strategy, VxWorks Products, Wind River.
“By working with industry leaders such as Curtiss-Wright Controls and GE Intelligent Platforms, we are helping customers realize efficiencies by using commercial off-the-shelf hardware solutions and the newly-enhanced capabilities of VxWorks 653 in their avionics systems.”
The VxWorks 653 Platform, version 2.3, is immediately available to customers.
The new release of VxWorks 653 builds on VxWorks 653’s existing support for the Freescale e600 Power Architecture, with new board support packages (BSPs) for the Curtiss-Wright Controls VPX6-185 and the Wind River SBC8641D boards, and extends hardware support to Intel 32-bit processor architectures, including a BSP for the GE Intelligent Platforms V7768 board. Additionally, VxWorks 653 Platform now provides a new power-fail safe DO-178B file system.
VxWorks 653 is an ARINC 653, real-time operating system for safety-critical Integrated Modular Avionics platforms, used in over 180 subsystems by over 100 customers worldwide for more than 40 airframes, including the Boeing 787 Dreamliner.
VxWorks 653 implements a strict two-level time and space scheduling and separation environment that supports the deployment of applications at different DO-178B safety levels on a single instance of silicon with very high performance and very low jitter.
VxWorks 653 also includes DO-178B qualified development tools that allow the rapid insertion of new software modules into a shared avionics platform without forcing a re-test of the entire environment, enabling high levels of integration and system refresh.
“Our collaboration with Wind River to develop a new board support package for our VPX6-185 board demonstrates further commitment to support our mutual aerospace and defense customers,” said Lynn Patterson, vice president and general manager, Curtiss-Wright Controls Embedded Computing. “Together, Curtiss-Wright Controls Embedded Computing and Wind River deliver proven commercial off-the-shelf solutions for safety critical applications that can help customers enjoy decreased development time and costs.”
"In addition to meeting the rigorous safety requirements of the avionics industry, we are also committed to helping our customers reduce costs and development cycles," said Peter Cavill, general manager, Military & Aerospace Products, GE Intelligent Platforms. "By working together with Wind River and its VxWorks 653 Platform, we can provide our customers with the power and reliability needed to meet the stringent requirements of the industry, while helping them complete projects on time, realize cost savings and bring solutions to market faster."
Wind River is committed to enhancing its proven ARINC 653 operating system to continue to serve the needs of the avionics market. Key features of the latest VxWorks 653 Platform release include:
* Hardware support for Power Architecture (PowerPC) broadened to include a BSP for the Curtiss-Wright Controls VPX6-185 MPC8641D-based board.
* Hardware support extended to Intel 32-bit processor architectures, specifically for Intel Core 2 and Celeron processors, with BSP support for the GE Intelligent Platforms V7768 board.
* DO-178B File System, a power-fail safe file system ready for use in systems requiring DO-178B Level A certification. It can be used from every application partition in an IMA system, and is supported by a range of devices. The file system is an optional, add-on component, further enhancing the development capabilities of VxWorks 653 for customers and increasing their development efficiency.
* Advanced project and workflow support in Wind River Workbench that improves the ease of usability of VxWorks 653 for customers when creating, configuring and building time- and space-partitioned VxWorks 653 projects.
* Improved DO-178B Network Stack support, through the inclusion of TCP, IGMPv1, and multicast support with the UDP/IPv4 network stack.
All VxWorks 653 runtime components from prior releases, including the DO-178B TCP/IP network stack, are supported with an extensive set of RTCA DO‑178B and EUROCAE ED-12B Level A commercial-off-the-shelf (COTS) certification evidence.
“Providing customers with choice in hardware and software allows them to create solutions that can deliver better performance-to-cost ratios depending on their specific projects; it also helps to decrease overall operating expenditures,” said Marc Brown, vice president, Marketing and Strategy, VxWorks Products, Wind River.
“By working with industry leaders such as Curtiss-Wright Controls and GE Intelligent Platforms, we are helping customers realize efficiencies by using commercial off-the-shelf hardware solutions and the newly-enhanced capabilities of VxWorks 653 in their avionics systems.”
The VxWorks 653 Platform, version 2.3, is immediately available to customers.
GaN power management chip market set for boom
EL SEGUNDO, USA: Thanks to rapid growth in the high-end server, notebook, mobile handset and wired communication segments, the Gallium Nitride (GaN) power management semiconductor market is expected to reach $183.6 million in revenue in 2013, up from virtually nil in 2010, according to iSuppli Corp.
GaN is an emerging process technology for power management chips that recently moved beyond the university-based testing phase and into the commercialization stage. The technology represents an attractive market opportunity for suppliers by providing their customers with capabilities that may be out of the reach of present semiconductor process materials.
“iSuppli believes that during the past two years, several events have occurred that have made GaN an up-and-coming star in the power management semiconductor world,” said Marijana Vukicevic, principal analyst for power management at iSuppli.
“First, the use of silicon has reached its practical limits in power management semiconductors. Furthermore, there have been major breakthroughs in growing GaN layers on silicon. Power designers also want to develop more efficient systems and to update their high-voltage products to waste less electricity.”
Component suppliers have begun offering GaN parts. International Rectifier Corp., for instance, released its first GaN technology-based Point-of-Load (POL) solutions in February, while Efficient Power Conversions Corp. (EPCC) is placing all its bets on GaN technology, releasing 10 power MOSFET devices this month.
The figure presents iSuppli’s GaN power management revenue forecast for the period of 2008 through 2013.
Source: iSuppli, USA
Efficiency needed
The adoption of GaN devices will be driven by the improved efficiency and small form factors enabled by the material. Such benefits are in particularly high demand for portable electronic products, including mobile PCs and smart phones. They also provide advantages for power-hungry electronic equipment, such as enterprise servers and wired communications infrastructure gear.
However, adoption of GaN technology for these applications in 2010 and 2011 will be slow due to the high cost of parts using the material. As the technology advances and the cost of manufacturing GaN technology drops in 2012 and 2013, the technology will begin to steal market share away from conventional MOSFETs, driver ICs and voltage regulator ICs.
The first adoption of GaN devices most likely will be among servers, which always demand high-performance devices and often are one of the first product areas to accept new technologies that improve performance. Over the next three years, the bulk of device volume likely will be driven by notebooks, as the power savings and smaller form factor delivered by GaN will be in high demand.
Source: iSuppli, USA
GaN is an emerging process technology for power management chips that recently moved beyond the university-based testing phase and into the commercialization stage. The technology represents an attractive market opportunity for suppliers by providing their customers with capabilities that may be out of the reach of present semiconductor process materials.
“iSuppli believes that during the past two years, several events have occurred that have made GaN an up-and-coming star in the power management semiconductor world,” said Marijana Vukicevic, principal analyst for power management at iSuppli.
“First, the use of silicon has reached its practical limits in power management semiconductors. Furthermore, there have been major breakthroughs in growing GaN layers on silicon. Power designers also want to develop more efficient systems and to update their high-voltage products to waste less electricity.”
Component suppliers have begun offering GaN parts. International Rectifier Corp., for instance, released its first GaN technology-based Point-of-Load (POL) solutions in February, while Efficient Power Conversions Corp. (EPCC) is placing all its bets on GaN technology, releasing 10 power MOSFET devices this month.
The figure presents iSuppli’s GaN power management revenue forecast for the period of 2008 through 2013.
Source: iSuppli, USAEfficiency needed
The adoption of GaN devices will be driven by the improved efficiency and small form factors enabled by the material. Such benefits are in particularly high demand for portable electronic products, including mobile PCs and smart phones. They also provide advantages for power-hungry electronic equipment, such as enterprise servers and wired communications infrastructure gear.
However, adoption of GaN technology for these applications in 2010 and 2011 will be slow due to the high cost of parts using the material. As the technology advances and the cost of manufacturing GaN technology drops in 2012 and 2013, the technology will begin to steal market share away from conventional MOSFETs, driver ICs and voltage regulator ICs.
The first adoption of GaN devices most likely will be among servers, which always demand high-performance devices and often are one of the first product areas to accept new technologies that improve performance. Over the next three years, the bulk of device volume likely will be driven by notebooks, as the power savings and smaller form factor delivered by GaN will be in high demand.
Source: iSuppli, USA
Tuesday, 30 March 2010
Time for a reality check..pessimism has swung too far
UK: According to Future Horizons, January’s WSTS results continued to follow the underlying industry recovery trend, with ICs sales up 4.8 percent versus December (on a 5-week month adjusted basis).
They were also up 73.7 percent versus January 2009, a relatively meaningless number other than to recall just how bad things were this time last year.
The real significance of January is its potential impact on first quarter sales. Were this run rate to continue through February and March, first quarter sales would be up 8 percent versus Q4-09. That would make 2010 grow a staggering 40 percent on 2009.
This is by no means a forecast but it does serve to illustrate the strength of the recovery from the abyss this time last year.
They were also up 73.7 percent versus January 2009, a relatively meaningless number other than to recall just how bad things were this time last year.
The real significance of January is its potential impact on first quarter sales. Were this run rate to continue through February and March, first quarter sales would be up 8 percent versus Q4-09. That would make 2010 grow a staggering 40 percent on 2009.
This is by no means a forecast but it does serve to illustrate the strength of the recovery from the abyss this time last year.
Applied Materials details plans for growth at analyst meeting
NEW YORK, USA: Applied Materials Inc held an analyst meeting to outline its plans for growing revenue and profitability over the next several years. Applied’s executive team shared the company’s goals of capitalizing on an expected multi-year expansion in the semiconductor industry, increasing market share across its businesses, and driving operational improvements.
Applied is seeing growth in demand across a number of its businesses, and the company now expects fiscal 2010 net sales to be more than 60 percent higher than in fiscal 2009 – compared to its previous forecast of up more than 50 percent.
“Applied Materials has engineered a solid operating model for the future, backed by innovative technologies and the strength of our most profitable businesses,” said Mike Splinter, chairman and CEO.
“Our momentum is strong, and we believe we are in the early stages of a multi-year growth cycle in many of our served markets. Applied will take advantage of opportunities arising from key market trends, including accelerating demand for consumer electronics in emerging markets worldwide, for increased semiconductor functionality and pervasiveness, and for cost-effective, renewable energy solutions.”
George Davis, chief financial officer, discussed how the company has increased the efficiency of its businesses while creating new opportunities that increase the company’s served market by billions of dollars annually.
“We are focused on helping our customers increase production as their end markets recover and on expanding our operations in Asia to serve our customers more effectively and efficiently. Business in each of our segments is improving, generating the earnings and cash flow necessary to fund our growth opportunities and reward our stockholders over the long term.”
Dr. Randhir Thakur, general manager of the Silicon Systems Group, detailed Applied’s progress in delivering products to enable the next chip generations during a multi-year semiconductor growth cycle.
“We will gain market share for the second consecutive year – most notably in our inspection and etch businesses. Our focus continues to be on our customers – collaborating closely with them to deliver innovative new technologies across our product lines to meet their current and future needs. We have launched six new products in the past six months and plan to accelerate this product introduction strategy throughout 2010.
“Our acquisition of Semitool last December gives us the leadership position in advanced packaging – a market that is expected to grow to nearly $1 billion over the next several years. At the same time, by driving efficiencies in the way we develop and deliver our products around the world, we are on track to deliver as much as 10 additional points of profit margin to the company’s bottom line.”
Charlie Pappis, general manager of Applied Global Services, spoke to the resilient business model of the company’s services group, which generated positive cash flow during 2009 – one of the most challenging years on record for the semiconductor industry.
“Asia holds the greatest opportunity for growth. We are developing closer customer ties in this region, both on an operational and a relationship basis, and expect about ten percent growth in the next several years.”
Applied’s LCD flat panel display equipment business is rebounding, led by growth in consumer demand in emerging markets, especially in China where flat panel TV sales were up 100% in 2009.
Jim Scholhamer, general manager of the Display Group, discussed how Applied’s LCD business is growing faster than the overall market, spurred by its new Pivot PVD* product that significantly reduces the materials cost in manufacturing LCD TVs.
“Applied is also prepared to serve customers as they transition to the display market’s most advanced Generation 10 and above technology – which will enable even larger LCD TV screens. In addition, we are well-positioned with our innovative product line to take advantage of the increasing demand for the latest touch screen, advanced LCD TV technologies and e-reader applications.”
Dr. Mark Pinto, chief technology officer and general manager of the Energy and Display Systems Group, discussed the strategies and opportunities for Applied’s Energy and Environmental Solutions (EES) segment.
“This business has enormous potential for growth, and we are capitalizing on Applied’s core strengths in technology and manufacturing innovation to take advantage of these opportunities. We rapidly became the top supplier of PV solar equipment in 2008, and the EES segment achieved $1.15 billion in revenue in fiscal year 2009.
“We have developed new products and applications to expand our market share in crystalline silicon, and have made excellent progress with our thin film customers in establishing the technology and installation advantages of the SunFab line for lowering the cost of electricity. We expect 2010 to be another growth year due to our strong position in the rapidly expanding market in China, the investments we’ve made in emerging energy-related areas, and improvements we’ve made in our bottom line performance.”
Applied is seeing growth in demand across a number of its businesses, and the company now expects fiscal 2010 net sales to be more than 60 percent higher than in fiscal 2009 – compared to its previous forecast of up more than 50 percent.
“Applied Materials has engineered a solid operating model for the future, backed by innovative technologies and the strength of our most profitable businesses,” said Mike Splinter, chairman and CEO.
“Our momentum is strong, and we believe we are in the early stages of a multi-year growth cycle in many of our served markets. Applied will take advantage of opportunities arising from key market trends, including accelerating demand for consumer electronics in emerging markets worldwide, for increased semiconductor functionality and pervasiveness, and for cost-effective, renewable energy solutions.”
George Davis, chief financial officer, discussed how the company has increased the efficiency of its businesses while creating new opportunities that increase the company’s served market by billions of dollars annually.
“We are focused on helping our customers increase production as their end markets recover and on expanding our operations in Asia to serve our customers more effectively and efficiently. Business in each of our segments is improving, generating the earnings and cash flow necessary to fund our growth opportunities and reward our stockholders over the long term.”
Dr. Randhir Thakur, general manager of the Silicon Systems Group, detailed Applied’s progress in delivering products to enable the next chip generations during a multi-year semiconductor growth cycle.
“We will gain market share for the second consecutive year – most notably in our inspection and etch businesses. Our focus continues to be on our customers – collaborating closely with them to deliver innovative new technologies across our product lines to meet their current and future needs. We have launched six new products in the past six months and plan to accelerate this product introduction strategy throughout 2010.
“Our acquisition of Semitool last December gives us the leadership position in advanced packaging – a market that is expected to grow to nearly $1 billion over the next several years. At the same time, by driving efficiencies in the way we develop and deliver our products around the world, we are on track to deliver as much as 10 additional points of profit margin to the company’s bottom line.”
Charlie Pappis, general manager of Applied Global Services, spoke to the resilient business model of the company’s services group, which generated positive cash flow during 2009 – one of the most challenging years on record for the semiconductor industry.
“Asia holds the greatest opportunity for growth. We are developing closer customer ties in this region, both on an operational and a relationship basis, and expect about ten percent growth in the next several years.”
Applied’s LCD flat panel display equipment business is rebounding, led by growth in consumer demand in emerging markets, especially in China where flat panel TV sales were up 100% in 2009.
Jim Scholhamer, general manager of the Display Group, discussed how Applied’s LCD business is growing faster than the overall market, spurred by its new Pivot PVD* product that significantly reduces the materials cost in manufacturing LCD TVs.
“Applied is also prepared to serve customers as they transition to the display market’s most advanced Generation 10 and above technology – which will enable even larger LCD TV screens. In addition, we are well-positioned with our innovative product line to take advantage of the increasing demand for the latest touch screen, advanced LCD TV technologies and e-reader applications.”
Dr. Mark Pinto, chief technology officer and general manager of the Energy and Display Systems Group, discussed the strategies and opportunities for Applied’s Energy and Environmental Solutions (EES) segment.
“This business has enormous potential for growth, and we are capitalizing on Applied’s core strengths in technology and manufacturing innovation to take advantage of these opportunities. We rapidly became the top supplier of PV solar equipment in 2008, and the EES segment achieved $1.15 billion in revenue in fiscal year 2009.
“We have developed new products and applications to expand our market share in crystalline silicon, and have made excellent progress with our thin film customers in establishing the technology and installation advantages of the SunFab line for lowering the cost of electricity. We expect 2010 to be another growth year due to our strong position in the rapidly expanding market in China, the investments we’ve made in emerging energy-related areas, and improvements we’ve made in our bottom line performance.”
New Intel Xeon processor pushes mission critical into mainstream
SANTA CLARA, USA: Intel Corp. culminated the transition to the company’s award-winning “Nehalem” chip design with the launch of the Intel Xeon 7500 processor series.
In less than 90 days, Intel has introduced the all-new 2010 PC, laptop and server processors that increase energy efficiency and computing speed and include a multitude of new features that make computers more intelligent, flexible and reliable.
Expandable to include from two to 256 chips per server, the new Intel Xeon processors have an average performance three times that of Intel’s existing Xeon 7400 series on common, leading enterprise benchmarks, and come equipped with more than 20 new reliability features.
Twenty old servers – To one new one
The combined scalable performance, advanced reliability and total cost of ownership advantages of the Xeon 7500 series will further accelerate the shift from proprietary systems to industry-standard Intel processor-based servers.
These new capabilities enable IT managers to consolidate up to 20 older single-core, 4-chip servers onto a single server using Intel Xeon 7500 series processors while maintaining the same level of performance. In doing so, they could also see up to a 92 percent estimated reduction in energy costs and a return on their investment estimated within 1 year due to reductions in power, cooling and licensing costs.
“The Xeon 7500 brings mission critical capabilities to the mainstream by delivering the most significant leap in performance, scalability and reliability ever seen from Intel,” said Kirk Skaugen, vice president of the Intel architecture group and general manager of Intel’s data center group. “This combination will help users push to new levels of productivity, and accelerate the industry’s migration away from proprietary architectures. We are democratizing high-end computing.”
New standards in reliability and scalability
Mission-critical workloads run by customers that simply cannot afford unscheduled downtime such as hospitals or stock exchanges can take advantage of more than 20 new features that deliver a leap forward in reliability, availability and serviceability (RAS). These reliability capabilities are designed to improve the protection of data integrity, increase availability and minimize planned downtime.
For example, this is the first Xeon processor to possess Machine Check Architecture (MCA) Recovery, a feature that allows the silicon to work with the operating system and virtual machine manager to recover from otherwise fatal system errors, a mechanism until now found only in the company's Intel Itanium processor family and RISC processors.
The Intel Xeon processor 7500 series offers unique scalability through modular building blocks enabled by Intel QuickPath Technology (QPI) interconnect. With QPI, cost-effective and highly scalable eight-processor servers that don’t require specialized third-party node controller chips to “glue” the system together can be built.
Intel is also working with system vendors to deliver “ultra-scale” systems with 16 processors for the enterprise, and up to 256 processors and support for 16 terabytes (one terabyte is equal to 1,000 gigabytes) of memory for high- performance computing “super nodes” running bandwidth-demanding applications such as financial analysis, numerical weather predictions and genome sequencing.
Large-scale virtualization
The Intel Xeon processor 7500 series meets the growing trend of IT organizations virtualizing large mission-critical workloads for applications such as Enterprise Resource Planning.
With up to eight times the memory bandwidth of the Intel Xeon processor 7400 series and four times the memory capacity with 16 memory slots per processor, the Xeon 7500 series can support one terabyte (or 1,000 gigabytes) of memory in a four-socket platform.
Intel Virtualization Technologies, which include new I/O virtualization capabilities and Intel Virtualization Technology (VT) FlexMigration, enables live VM migration across all Intel Core microarchitecture-based platforms to ensure investment protection for administrators seeking to use pools of virtualized systems to facilitate failover, disaster recovery, load balancing and optimal server maintenance and downtime.
Two-chip and cost optimized servers
New two-chip expandable class platforms with large memory capacity based on the Intel Xeon processor 7500 series are ideal for memory intensive databases and virtualization environments.
The Intel Xeon processor 7500 series is available in quad, six and eight core versions with twice the number of threads thanks to Intel Hyper-Threading Technology. The Intel Xeon processor 6500 series provides a lower cost solution for 2-chip servers with large memory requirements.
The Intel Xeon processor 7500 series supports up to eight integrated cores and 16 threads, and can scale up to 32 cores and 64 threads per 4-chip platform or 64 cores and 128 threads per 8-chip platform, and is available with frequencies up to 2.66 GHz, and 24 MB of Intel Smart Cache memory, four Intel QPI links and Intel Turbo Boost technology. Thermal Design Point (TDP) power levels range from 95 watts to 130 watts.
The Intel Xeon processor X7560, with eight cores and 24MB cache size, is built for highly parallel, data demanding and mission-critical workloads, whereas the Intel Xeon processor X7542 is a frequency-optimized 6-core option at 2.66 GHz targeted for super node high-performance computing applications in science and financial services.
The innovative modular scaling of the Xeon 7500 processor works with the Intel 7500 Chipset and Intel 7500 Scalable Memory Buffers to enable unique OEM system designs and brings a wide range of socket, memory and I/O, form factor, and reliability feature sets never before available to the mainstream server market.
Enterprise software vendors expected to support the high-end features of Intel Xeon processor 7500-based platforms, include Citrix, IBM, Microsoft, Novell, Oracle, Red Hat, SAP AG and VMware.
System vendors are lining up to take advantage of the high-end Intel Xeon processor 7500 series capabilities and deliver highly innovative solutions at much lower costs than older proprietary solutions. With more than double the amount of designs versus the previous generation Intel Xeon processor 7400 series, system manufacturers were expected to announce systems based on the Intel Xeon processor 7500/6500 processor starting today.
In less than 90 days, Intel has introduced the all-new 2010 PC, laptop and server processors that increase energy efficiency and computing speed and include a multitude of new features that make computers more intelligent, flexible and reliable.Expandable to include from two to 256 chips per server, the new Intel Xeon processors have an average performance three times that of Intel’s existing Xeon 7400 series on common, leading enterprise benchmarks, and come equipped with more than 20 new reliability features.
Twenty old servers – To one new one
The combined scalable performance, advanced reliability and total cost of ownership advantages of the Xeon 7500 series will further accelerate the shift from proprietary systems to industry-standard Intel processor-based servers.
These new capabilities enable IT managers to consolidate up to 20 older single-core, 4-chip servers onto a single server using Intel Xeon 7500 series processors while maintaining the same level of performance. In doing so, they could also see up to a 92 percent estimated reduction in energy costs and a return on their investment estimated within 1 year due to reductions in power, cooling and licensing costs.
“The Xeon 7500 brings mission critical capabilities to the mainstream by delivering the most significant leap in performance, scalability and reliability ever seen from Intel,” said Kirk Skaugen, vice president of the Intel architecture group and general manager of Intel’s data center group. “This combination will help users push to new levels of productivity, and accelerate the industry’s migration away from proprietary architectures. We are democratizing high-end computing.”
New standards in reliability and scalability
Mission-critical workloads run by customers that simply cannot afford unscheduled downtime such as hospitals or stock exchanges can take advantage of more than 20 new features that deliver a leap forward in reliability, availability and serviceability (RAS). These reliability capabilities are designed to improve the protection of data integrity, increase availability and minimize planned downtime.
For example, this is the first Xeon processor to possess Machine Check Architecture (MCA) Recovery, a feature that allows the silicon to work with the operating system and virtual machine manager to recover from otherwise fatal system errors, a mechanism until now found only in the company's Intel Itanium processor family and RISC processors.
The Intel Xeon processor 7500 series offers unique scalability through modular building blocks enabled by Intel QuickPath Technology (QPI) interconnect. With QPI, cost-effective and highly scalable eight-processor servers that don’t require specialized third-party node controller chips to “glue” the system together can be built.
Intel is also working with system vendors to deliver “ultra-scale” systems with 16 processors for the enterprise, and up to 256 processors and support for 16 terabytes (one terabyte is equal to 1,000 gigabytes) of memory for high- performance computing “super nodes” running bandwidth-demanding applications such as financial analysis, numerical weather predictions and genome sequencing.
Large-scale virtualization
The Intel Xeon processor 7500 series meets the growing trend of IT organizations virtualizing large mission-critical workloads for applications such as Enterprise Resource Planning.
With up to eight times the memory bandwidth of the Intel Xeon processor 7400 series and four times the memory capacity with 16 memory slots per processor, the Xeon 7500 series can support one terabyte (or 1,000 gigabytes) of memory in a four-socket platform.
Intel Virtualization Technologies, which include new I/O virtualization capabilities and Intel Virtualization Technology (VT) FlexMigration, enables live VM migration across all Intel Core microarchitecture-based platforms to ensure investment protection for administrators seeking to use pools of virtualized systems to facilitate failover, disaster recovery, load balancing and optimal server maintenance and downtime.
Two-chip and cost optimized servers
New two-chip expandable class platforms with large memory capacity based on the Intel Xeon processor 7500 series are ideal for memory intensive databases and virtualization environments.
The Intel Xeon processor 7500 series is available in quad, six and eight core versions with twice the number of threads thanks to Intel Hyper-Threading Technology. The Intel Xeon processor 6500 series provides a lower cost solution for 2-chip servers with large memory requirements.
The Intel Xeon processor 7500 series supports up to eight integrated cores and 16 threads, and can scale up to 32 cores and 64 threads per 4-chip platform or 64 cores and 128 threads per 8-chip platform, and is available with frequencies up to 2.66 GHz, and 24 MB of Intel Smart Cache memory, four Intel QPI links and Intel Turbo Boost technology. Thermal Design Point (TDP) power levels range from 95 watts to 130 watts.
The Intel Xeon processor X7560, with eight cores and 24MB cache size, is built for highly parallel, data demanding and mission-critical workloads, whereas the Intel Xeon processor X7542 is a frequency-optimized 6-core option at 2.66 GHz targeted for super node high-performance computing applications in science and financial services.
The innovative modular scaling of the Xeon 7500 processor works with the Intel 7500 Chipset and Intel 7500 Scalable Memory Buffers to enable unique OEM system designs and brings a wide range of socket, memory and I/O, form factor, and reliability feature sets never before available to the mainstream server market.
Enterprise software vendors expected to support the high-end features of Intel Xeon processor 7500-based platforms, include Citrix, IBM, Microsoft, Novell, Oracle, Red Hat, SAP AG and VMware.
System vendors are lining up to take advantage of the high-end Intel Xeon processor 7500 series capabilities and deliver highly innovative solutions at much lower costs than older proprietary solutions. With more than double the amount of designs versus the previous generation Intel Xeon processor 7400 series, system manufacturers were expected to announce systems based on the Intel Xeon processor 7500/6500 processor starting today.
Legacy Electronics releases 8GB very low profile modules for server apps
SAN CLEMENTE, USA: Design engineers and system integrators now have a new very low profile option for both registered dual in-line memory modules (RDIMMs) and mini-RDIMMs. Using Legacy Electronics’ patented Multiple Device Canopy (MDC) processes, designers can increase existing module density and still maintain 2-rank capability.
Jason Engle, president of Legacy Electronics, explains: “Our 4Gbit MDC DRAM is functionally and electrically equivalent to a dual die package DRAM, and can be configured to provide significant cost and space savings. We are currently offering two JEDEC Standard VLP registered ECC DIMM modules using the MDC solution: either a DDR2 8GB RDIMM or a DDR2 Mini-RDIMM. Custom MDC solutions are also available.”
Don Mecker, Legacy’s chief technology officer, added: “It’s every engineer’s dream to be able to add a whole new dimension to his or her design capabilities. And that’s what MDC® does for us; it gives us vertical space.”
The two 8GB DDR2 RDIMMs provide the 18.3 mm height low profile form factor, on either a 240-pin (RDIMM) or 244-pin (mini-RDIMM) glass epoxy substrate.
Jason Engle, president of Legacy Electronics, explains: “Our 4Gbit MDC DRAM is functionally and electrically equivalent to a dual die package DRAM, and can be configured to provide significant cost and space savings. We are currently offering two JEDEC Standard VLP registered ECC DIMM modules using the MDC solution: either a DDR2 8GB RDIMM or a DDR2 Mini-RDIMM. Custom MDC solutions are also available.”
Don Mecker, Legacy’s chief technology officer, added: “It’s every engineer’s dream to be able to add a whole new dimension to his or her design capabilities. And that’s what MDC® does for us; it gives us vertical space.”
The two 8GB DDR2 RDIMMs provide the 18.3 mm height low profile form factor, on either a 240-pin (RDIMM) or 244-pin (mini-RDIMM) glass epoxy substrate.
SMIC bases DFM sign-off strategy on Mentor Graphics Calibre platform
WILSONVILLE, USA: Mentor Graphics Corp. announced that Semiconductor Manufacturing International Corp. (SMIC) has qualified Mentor Graphics Calibre products as the reference platform for design-for-manufacturing (DFM) sign-off for 65nm and smaller processes.
The reference flow includes all elements of the Calibre DFM offering including: the Calibre LFD product for litho checking; the Calibre CMPAnalyzer product for CMP (planarity) simulation; the Calibre YieldAnalyzer product for critical area analysis (CAA) and simulation; and the Calibre YieldEnhancer product with SmartFill for automated DFM layout improvements, including highly-optimized planarity fill. SMIC is also using the Calibre solution for its DFM services offerings.
“We are moving aggressively to add DFM sign-off requirements for 65nm and below, making it mandatory at all levels, including full-chip, block and IP,” said Max Liu, vice president, Corporate Design Service Center at SMIC.
“We selected Calibre because we found it to be a complete, accurate and reliable platform for DFM, ensuring the effectiveness of SMIC’s reference flow. For example, Calibre LFD is a primary litho-checking tool accurate enough to be certified on our 65nm process. Consequently, process variability analysis tools used in our flow, including electrical analysis, use contours generated by Calibre LFD.
“Also, Calibre CMPAnalyzer provides the ability for SMIC to build and modify our CMP model, giving us greater flexibility and control of the DFM process. In addition, Calibre, as a widely-used platform in the industry for the entire post tapeout flow, makes it easy for our customers to integrate IP that has also been verified with Calibre into their designs.”
“Using DFM is becoming a competitive factor for both foundries and fabless designers,” said Joseph Sawicki, vice president and general manager for the Design-to-Silicon Division at Mentor Graphics.
“The Calibre platform makes DFM a seamless extension to our customers’ existing physical verification flow, making product adoption simple and delivering a performance advantage that reduces overall cycle time.”
The reference flow includes all elements of the Calibre DFM offering including: the Calibre LFD product for litho checking; the Calibre CMPAnalyzer product for CMP (planarity) simulation; the Calibre YieldAnalyzer product for critical area analysis (CAA) and simulation; and the Calibre YieldEnhancer product with SmartFill for automated DFM layout improvements, including highly-optimized planarity fill. SMIC is also using the Calibre solution for its DFM services offerings.
“We are moving aggressively to add DFM sign-off requirements for 65nm and below, making it mandatory at all levels, including full-chip, block and IP,” said Max Liu, vice president, Corporate Design Service Center at SMIC.
“We selected Calibre because we found it to be a complete, accurate and reliable platform for DFM, ensuring the effectiveness of SMIC’s reference flow. For example, Calibre LFD is a primary litho-checking tool accurate enough to be certified on our 65nm process. Consequently, process variability analysis tools used in our flow, including electrical analysis, use contours generated by Calibre LFD.
“Also, Calibre CMPAnalyzer provides the ability for SMIC to build and modify our CMP model, giving us greater flexibility and control of the DFM process. In addition, Calibre, as a widely-used platform in the industry for the entire post tapeout flow, makes it easy for our customers to integrate IP that has also been verified with Calibre into their designs.”
“Using DFM is becoming a competitive factor for both foundries and fabless designers,” said Joseph Sawicki, vice president and general manager for the Design-to-Silicon Division at Mentor Graphics.
“The Calibre platform makes DFM a seamless extension to our customers’ existing physical verification flow, making product adoption simple and delivering a performance advantage that reduces overall cycle time.”
Rohde&Schwarz achieves higher quality RFICs with Cadence Virtuoso APS
FELDKIRCHEN, GERMANY: Cadence Design Systems Inc. announced that Rohde & Schwarz, a market leader in complex RF test and measurement products, improved the quality and functionality of its complex RF integrated circuits (RFICs) through an increased simulation depth using Cadence Virtuoso Accelerated Parallel Simulator (APS).
Rohde & Schwarz seeks to maximize simulation efficiency when developing key ASIC components to stay ahead of the competition and protect its IP. The Cadence simulator’s accuracy, performance and ease of use enabled the company to experience a significant simulation gain with mixed-signal RF circuits featuring as many as 64,000 mutual inductors and 3,000 actual inductors.
“The Virtuoso Accelerated Parallel Simulator increased the productivity in our analog verification efforts, enabling exhaustive simulation and reducing the risk of errors,” said Gerhard Kahmen, head of R&D Mixed-Signal IC at Rohde & Schwarz. ”We were very pleased to increase overall simulation depth across various classes of circuits by factors of 4 to 16.”
“Conventional simulators are not able to simulate and verify ICs with such a complexity and accuracy,” said Zhihong Lui, corporate vice president at Cadence.
“With the Virtuoso Accelerated Parallel Simulator, Rohde & Schwarz is now in the position to create RF simulation plans that are substantially more comprehensive than before. Our simulator helps our customers to simulate not just parts of the circuits but to simulate RF subsystems with large numbers of mutual and actual inductors, regardless of the process nodes used.”
The Virtuoso Accelerated Parallel Simulator delivers the full accuracy of the Virtuoso Spectre Circuit Simulator, used by Rohde & Schwarz as their sign-off simulator.
Developed to solve the largest and most complex analog and mixed-signal designs across all process nodes, the APS simulator consists of a combination of proven Cadence simulation technologies and a breakthrough parallel circuit solver, along with a newly architected engine that efficiently harnesses the power of multiprocessing computing platforms.
Rohde & Schwarz seeks to maximize simulation efficiency when developing key ASIC components to stay ahead of the competition and protect its IP. The Cadence simulator’s accuracy, performance and ease of use enabled the company to experience a significant simulation gain with mixed-signal RF circuits featuring as many as 64,000 mutual inductors and 3,000 actual inductors.
“The Virtuoso Accelerated Parallel Simulator increased the productivity in our analog verification efforts, enabling exhaustive simulation and reducing the risk of errors,” said Gerhard Kahmen, head of R&D Mixed-Signal IC at Rohde & Schwarz. ”We were very pleased to increase overall simulation depth across various classes of circuits by factors of 4 to 16.”
“Conventional simulators are not able to simulate and verify ICs with such a complexity and accuracy,” said Zhihong Lui, corporate vice president at Cadence.
“With the Virtuoso Accelerated Parallel Simulator, Rohde & Schwarz is now in the position to create RF simulation plans that are substantially more comprehensive than before. Our simulator helps our customers to simulate not just parts of the circuits but to simulate RF subsystems with large numbers of mutual and actual inductors, regardless of the process nodes used.”
The Virtuoso Accelerated Parallel Simulator delivers the full accuracy of the Virtuoso Spectre Circuit Simulator, used by Rohde & Schwarz as their sign-off simulator.
Developed to solve the largest and most complex analog and mixed-signal designs across all process nodes, the APS simulator consists of a combination of proven Cadence simulation technologies and a breakthrough parallel circuit solver, along with a newly architected engine that efficiently harnesses the power of multiprocessing computing platforms.
3M, Yushin Precision Equipment ally on temporary wafer bonding to enable 3-D semiconductors
ST. PAUL, USA: 3M, a leading supplier of advanced materials to the semiconductor industry, and Yushin Precision Equipment Co. Ltd, of Japan, a leading supplier of automation and packaging equipment, announced an agreement to allow Yushin Precision Equipment to manufacture and sell equipment for temporary bonding of ultrathin wafers required for 3-D packaging.
As part of this agreement, Yushin Precision Equipment becomes a 3M Authorized Equipment Supplier for equipment that is configured to use 3M Wafer Support System (WSS) materials including 3M’s Liquid UV-Curable Adhesive and Light-To-Heat Conversion coating. Under the agreement both companies will continue to work closely to address customer demands for high-performance process solutions that support high-volume manufacturing with a competitive cost of ownership.
The 3M Wafer Support System includes equipment and materials that allow temporary wafer bonding to support wafer thinning and subsequent processing of ultra thin wafers for 3D packaging. 3M’s innovative use of a UV curable adhesive for wafer bonding to glass carriers provides robust wafer support throughout wafer grinding and subsequent multiple high-temperature processing cycles.
After processing, 3M’s unique Light-To-Heat Conversion layer allows low stress, room temperature debonding of the thinned wafer directly to a tape carrier. The thinned wafer is supported throughout the entire process thereby minimizing warpage, stress and process complexity. As compared to other processes that expose the thinned wafer to high-temperature and stress or other processes that use solvents to release the thinned wafer, 3M’s process and materials solutions enables high-volume manufacturing at multiple semiconductor sites worldwide today.
“The agreement ensures our joint customers access to Yushin supplied equipment that was previously sold under the 3M brand and builds on the successful relationship the two companies have had over several years,” said Mike Bowman, marketing development manager for 3M Electronics Markets Materials Division.
“Customers can now simplify the equipment sales and support process by purchasing the equipment directly from any of 3M’s three Authorized WSS Equipment Suppliers, which includes Yushin Precision Equipment. This enables 3M to focus on its core strengths in materials development to address customer requirements for advanced materials for 3-D semiconductor manufacturing.”
Since 2004 Yushin Precision Equipment has worked with 3M to design and develop equipment for temporary bonding of ultrathin wafers to optimize 3M’s materials. This joint development has resulted in multiple systems that have been placed worldwide.
“Our strong relationship with 3M allows both companies to support customer requirements for equipment and materials for advanced 3-D packaging solutions on a global scale,” said Satoshi Kimura, executive managing director at Yushin Precision Equipment. “Together we are able to offer world-class precision material handling and packaging experience and the best process materials.
As part of this agreement, Yushin Precision Equipment becomes a 3M Authorized Equipment Supplier for equipment that is configured to use 3M Wafer Support System (WSS) materials including 3M’s Liquid UV-Curable Adhesive and Light-To-Heat Conversion coating. Under the agreement both companies will continue to work closely to address customer demands for high-performance process solutions that support high-volume manufacturing with a competitive cost of ownership.
The 3M Wafer Support System includes equipment and materials that allow temporary wafer bonding to support wafer thinning and subsequent processing of ultra thin wafers for 3D packaging. 3M’s innovative use of a UV curable adhesive for wafer bonding to glass carriers provides robust wafer support throughout wafer grinding and subsequent multiple high-temperature processing cycles.
After processing, 3M’s unique Light-To-Heat Conversion layer allows low stress, room temperature debonding of the thinned wafer directly to a tape carrier. The thinned wafer is supported throughout the entire process thereby minimizing warpage, stress and process complexity. As compared to other processes that expose the thinned wafer to high-temperature and stress or other processes that use solvents to release the thinned wafer, 3M’s process and materials solutions enables high-volume manufacturing at multiple semiconductor sites worldwide today.
“The agreement ensures our joint customers access to Yushin supplied equipment that was previously sold under the 3M brand and builds on the successful relationship the two companies have had over several years,” said Mike Bowman, marketing development manager for 3M Electronics Markets Materials Division.
“Customers can now simplify the equipment sales and support process by purchasing the equipment directly from any of 3M’s three Authorized WSS Equipment Suppliers, which includes Yushin Precision Equipment. This enables 3M to focus on its core strengths in materials development to address customer requirements for advanced materials for 3-D semiconductor manufacturing.”
Since 2004 Yushin Precision Equipment has worked with 3M to design and develop equipment for temporary bonding of ultrathin wafers to optimize 3M’s materials. This joint development has resulted in multiple systems that have been placed worldwide.
“Our strong relationship with 3M allows both companies to support customer requirements for equipment and materials for advanced 3-D packaging solutions on a global scale,” said Satoshi Kimura, executive managing director at Yushin Precision Equipment. “Together we are able to offer world-class precision material handling and packaging experience and the best process materials.
NEC Electronics America expands 8-bit all Flash MCUs for industrial, consumer electronics precision control
SANTA CLARA, USA: NEC Electronics America, Inc. has expanded its robust 8-bit microcontroller (MCU) portfolio with the new All Flash 78K0/Kx2-A MCU series, featuring enhanced analog functionality for battery-operated portable devices.
The four new MCUs offer robust peripherals combined with NEC Electronics’ proven 78K0 MCU interface and safety features to support applications that require high-precision analog sensing capabilities. Target applications include industrial building automation sensors and monitoring devices, and consumer electronics devices with human interface systems such as game-control handsets.
The new 78K0/Kx2-A series extends the rich analog peripheral set offered in NEC Electronics’ 78K0/Kx2 general-purpose MCUs and includes up to 12 channels of 12-bit analog-to-digital converters (ADCs), and 3-channel operational amplifiers (op-amps) interlocked with 12-bit ADC inputs.
To facilitate easy migration within the 78K0/Kx2 series, the new 78K0/Kx2-A MCUs also share many of the built-in features common to the 78K0 MCU family. The peripheral set includes UART, I2C and CSI/SPI serial interfaces, 8- and 16-bit timers to manage an array of real-time input and output events, clock generators, and a real-time counter with clock and calendar functions to maintain time-of-day clock without CPU intervention.
The analog and serial interface integration helps to reduce system costs, while the optimized 8-bit circuit design helps designers achieve low power consumption and high performance levels similar to those associated with NEC Electronics’ other 78K0/Kx2 devices.
NEC Electronics America also provides a comprehensive suite of development tools to support the new 78K0/Kx2-A series. This includes software tools such as the CubeSuite integrated development environment, compiler, assembler, software debugger and code generator, as well as hardware tools such as NEC Electronics’ full-function IECube in-circuit emulator with real-time trace and MINICUBE2 on-chip debug emulator and stand-alone flash programmer.
The new 78K0/Kx2-A MCUs will be available in a 30-pin shrink-small outline package (SSOP) and 48-pin low-profile quad flat package (QFP) with flash memory capacities ranging from 16 to 32 kilobytes (KB).
Samples are available now and distribution suggested resale pricing begins at $1.65 in volumes of 10,000 units. Mass production of the new devices is slated to begin in July 2010.
The four new MCUs offer robust peripherals combined with NEC Electronics’ proven 78K0 MCU interface and safety features to support applications that require high-precision analog sensing capabilities. Target applications include industrial building automation sensors and monitoring devices, and consumer electronics devices with human interface systems such as game-control handsets.
The new 78K0/Kx2-A series extends the rich analog peripheral set offered in NEC Electronics’ 78K0/Kx2 general-purpose MCUs and includes up to 12 channels of 12-bit analog-to-digital converters (ADCs), and 3-channel operational amplifiers (op-amps) interlocked with 12-bit ADC inputs.
To facilitate easy migration within the 78K0/Kx2 series, the new 78K0/Kx2-A MCUs also share many of the built-in features common to the 78K0 MCU family. The peripheral set includes UART, I2C and CSI/SPI serial interfaces, 8- and 16-bit timers to manage an array of real-time input and output events, clock generators, and a real-time counter with clock and calendar functions to maintain time-of-day clock without CPU intervention.
The analog and serial interface integration helps to reduce system costs, while the optimized 8-bit circuit design helps designers achieve low power consumption and high performance levels similar to those associated with NEC Electronics’ other 78K0/Kx2 devices.
NEC Electronics America also provides a comprehensive suite of development tools to support the new 78K0/Kx2-A series. This includes software tools such as the CubeSuite integrated development environment, compiler, assembler, software debugger and code generator, as well as hardware tools such as NEC Electronics’ full-function IECube in-circuit emulator with real-time trace and MINICUBE2 on-chip debug emulator and stand-alone flash programmer.
The new 78K0/Kx2-A MCUs will be available in a 30-pin shrink-small outline package (SSOP) and 48-pin low-profile quad flat package (QFP) with flash memory capacities ranging from 16 to 32 kilobytes (KB).
Samples are available now and distribution suggested resale pricing begins at $1.65 in volumes of 10,000 units. Mass production of the new devices is slated to begin in July 2010.
Cypress intros PSoC 3 and PSoC 5 device selection tool for designers
SAN JOSE, USA: Cypress Semiconductor Corp. has introduced a new online product selection tool for its powerful new PSoC 3 and PSoC 5 architectures.
The Electronic Product Selector Guide, now available at www.cypress.com/go/PSoCePSG, streamlines the selection of the optimal PSoC device based on the peripheral functions a designer wants to implement in the programmable analog and digital resources.
As a user makes selections in the tool’s intuitive user interface, the “Results” field of applicable parts dynamically narrows down, displaying the part with the best match first. Once the search criteria are entered, the user can select devices to compare, click on the part numbers for more information, and rearrange the feature columns to highlight the most relevant data.
“It helps PSoC veterans and newcomers alike to quickly identify the ideal part for a design based on the desired peripheral functions, while also highlighting the unique flexibility of PSoC to solve a wide range of applications with the on-chip programmable analog and digital resources.”
The Electronic Product Selector Guide allows designers to easily customize:
* the number of ADCs, DACs, comparators, OpAmps, PGAs, TIAs and mixers needed in the analog subsystem;
* the number of timers, PWMs, counters and communications interfaces, including I2C, SPI, UART, I2S, Full-Speed USB and CAN, needed in the digital subsystem;
* the speed, microcontroller core, memory, voltage, temperature range and package in the CPU subsystem;
* advanced features such as CapSense touch-sensing, LCD direct drive and more.
PSoC 3 and PSoC 5 devices extend the world’s only programmable analog and digital embedded design platform, delivering unmatched time-to-market, integration and flexibility across 8-, 16-, and 32-bit applications.
The platform is powered by the revolutionary PSoC Creator Integrated Development Environment (IDE), which introduces a unique schematic-based design methodology along with fully tested, pre-packaged analog and digital peripherals easily customizable through user-intuitive wizards and APIs to meet specific design requirements.
“This new product selection tool makes it even easier to add the flexibility and integration of the PSoC platform into a design,” said Matt Branda, marketing director of PSoC Platform products at Cypress.
“It helps PSoC veterans and newcomers alike to quickly identify the ideal part for a design based on the desired peripheral functions, while also highlighting the unique flexibility of PSoC to solve a wide range of applications with the on-chip programmable analog and digital resources.”
Cypress is planning to expand the Electronic Product Selector Guide to include PSoC 1 devices later this year.
The Electronic Product Selector Guide, now available at www.cypress.com/go/PSoCePSG, streamlines the selection of the optimal PSoC device based on the peripheral functions a designer wants to implement in the programmable analog and digital resources.
As a user makes selections in the tool’s intuitive user interface, the “Results” field of applicable parts dynamically narrows down, displaying the part with the best match first. Once the search criteria are entered, the user can select devices to compare, click on the part numbers for more information, and rearrange the feature columns to highlight the most relevant data.
“It helps PSoC veterans and newcomers alike to quickly identify the ideal part for a design based on the desired peripheral functions, while also highlighting the unique flexibility of PSoC to solve a wide range of applications with the on-chip programmable analog and digital resources.”
The Electronic Product Selector Guide allows designers to easily customize:
* the number of ADCs, DACs, comparators, OpAmps, PGAs, TIAs and mixers needed in the analog subsystem;
* the number of timers, PWMs, counters and communications interfaces, including I2C, SPI, UART, I2S, Full-Speed USB and CAN, needed in the digital subsystem;
* the speed, microcontroller core, memory, voltage, temperature range and package in the CPU subsystem;
* advanced features such as CapSense touch-sensing, LCD direct drive and more.
PSoC 3 and PSoC 5 devices extend the world’s only programmable analog and digital embedded design platform, delivering unmatched time-to-market, integration and flexibility across 8-, 16-, and 32-bit applications.
The platform is powered by the revolutionary PSoC Creator Integrated Development Environment (IDE), which introduces a unique schematic-based design methodology along with fully tested, pre-packaged analog and digital peripherals easily customizable through user-intuitive wizards and APIs to meet specific design requirements.
“This new product selection tool makes it even easier to add the flexibility and integration of the PSoC platform into a design,” said Matt Branda, marketing director of PSoC Platform products at Cypress.
“It helps PSoC veterans and newcomers alike to quickly identify the ideal part for a design based on the desired peripheral functions, while also highlighting the unique flexibility of PSoC to solve a wide range of applications with the on-chip programmable analog and digital resources.”
Cypress is planning to expand the Electronic Product Selector Guide to include PSoC 1 devices later this year.
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